aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorDan Gohman <djg@cray.com>2008-02-08 03:29:40 +0000
committerDan Gohman <djg@cray.com>2008-02-08 03:29:40 +0000
commit06844678cf2755eed47919a62ba979e6bff2dcd5 (patch)
tree7b4b4c34af88d5e8a0f0e5005b762429e26c46b7
parent8cdf7897416cf307bcae281ef8a0f80873d31356 (diff)
downloadexternal_llvm-06844678cf2755eed47919a62ba979e6bff2dcd5.zip
external_llvm-06844678cf2755eed47919a62ba979e6bff2dcd5.tar.gz
external_llvm-06844678cf2755eed47919a62ba979e6bff2dcd5.tar.bz2
Avoid needlessly casting away const qualifiers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46877 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86CodeEmitter.cpp6
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp6
-rw-r--r--lib/Target/X86/X86RegisterInfo.cpp2
-rw-r--r--lib/Target/X86/X86RegisterInfo.h2
4 files changed, 8 insertions, 8 deletions
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index 485eeb5..1444733 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -84,7 +84,7 @@ namespace {
unsigned Op, unsigned RegOpcodeField,
intptr_t PCAdj = 0);
- unsigned getX86RegNum(unsigned RegNo);
+ unsigned getX86RegNum(unsigned RegNo) const;
bool isX86_64ExtendedReg(const MachineOperand &MO);
unsigned determineREX(const MachineInstr &MI);
@@ -210,8 +210,8 @@ void Emitter::emitJumpTableAddress(unsigned JTI, unsigned Reloc,
MCE.emitWordLE(0); // The relocated value will be added to the displacement
}
-unsigned Emitter::getX86RegNum(unsigned RegNo) {
- return ((X86RegisterInfo&)II->getRegisterInfo()).getX86RegNum(RegNo);
+unsigned Emitter::getX86RegNum(unsigned RegNo) const {
+ return ((const X86RegisterInfo&)II->getRegisterInfo()).getX86RegNum(RegNo);
}
inline static unsigned char ModRMByte(unsigned Mod, unsigned RegOpcode,
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 7ff4e55..de1a648 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -4948,9 +4948,9 @@ SDOperand X86TargetLowering::LowerTRAMPOLINE(SDOperand Op,
const unsigned char MOV64ri = TII->getBaseOpcodeFor(X86::MOV64ri);
const unsigned char N86R10 =
- ((X86RegisterInfo*)RegInfo)->getX86RegNum(X86::R10);
+ ((const X86RegisterInfo*)RegInfo)->getX86RegNum(X86::R10);
const unsigned char N86R11 =
- ((X86RegisterInfo*)RegInfo)->getX86RegNum(X86::R11);
+ ((const X86RegisterInfo*)RegInfo)->getX86RegNum(X86::R11);
const unsigned char REX_WB = 0x40 | 0x08 | 0x01; // REX prefix
@@ -5038,7 +5038,7 @@ SDOperand X86TargetLowering::LowerTRAMPOLINE(SDOperand Op,
const unsigned char MOV32ri = TII->getBaseOpcodeFor(X86::MOV32ri);
const unsigned char N86Reg =
- ((X86RegisterInfo*)RegInfo)->getX86RegNum(NestReg);
+ ((const X86RegisterInfo*)RegInfo)->getX86RegNum(NestReg);
OutChains[0] = DAG.getStore(Root, DAG.getConstant(MOV32ri|N86Reg, MVT::i8),
Trmp, TrmpAddr, 0);
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index cebc10f..931df4d 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -82,7 +82,7 @@ int X86RegisterInfo::getDwarfRegNum(unsigned RegNo, bool isEH) const {
// getX86RegNum - This function maps LLVM register identifiers to their X86
// specific numbering, which is used in various places encoding instructions.
//
-unsigned X86RegisterInfo::getX86RegNum(unsigned RegNo) {
+unsigned X86RegisterInfo::getX86RegNum(unsigned RegNo) const {
switch(RegNo) {
case X86::RAX: case X86::EAX: case X86::AX: case X86::AL: return N86::EAX;
case X86::RCX: case X86::ECX: case X86::CX: case X86::CL: return N86::ECX;
diff --git a/lib/Target/X86/X86RegisterInfo.h b/lib/Target/X86/X86RegisterInfo.h
index e36d5166..02f237d 100644
--- a/lib/Target/X86/X86RegisterInfo.h
+++ b/lib/Target/X86/X86RegisterInfo.h
@@ -71,7 +71,7 @@ public:
/// getX86RegNum - Returns the native X86 register number for the given LLVM
/// register identifier.
- unsigned getX86RegNum(unsigned RegNo);
+ unsigned getX86RegNum(unsigned RegNo) const;
unsigned getStackAlignment() const { return StackAlign; }