Add a isBigEndian method to complement isLittleEndian.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46954 91177308-0d34-0410-b5e6-96231b3b80d8

4 files changed, 12 insertions, 11 deletions

diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
index 9094e37..947a1d6 100644
--- a/include/llvm/Target/TargetLowering.h
+++ b/include/llvm/Target/TargetLowering.h
@@ -85,6 +85,7 @@ public:
   TargetMachine &getTargetMachine() const { return TM; }
   const TargetData *getTargetData() const { return TD; }
 
+  bool isBigEndian() const { return !IsLittleEndian; }
   bool isLittleEndian() const { return IsLittleEndian; }
   MVT::ValueType getPointerTy() const { return PointerTy; }
   MVT::ValueType getShiftAmountTy() const { return ShiftAmountTy; }
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 3a03f2c..a2f36f3 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -1739,7 +1739,7 @@ SDOperand DAGCombiner::visitAND(SDNode *N) {
         unsigned PtrOff = LVTStoreBytes - EVTStoreBytes;
         unsigned Alignment = LN0->getAlignment();
         SDOperand NewPtr = LN0->getBasePtr();
-        if (!TLI.isLittleEndian()) {
+        if (TLI.isBigEndian()) {
           NewPtr = DAG.getNode(ISD::ADD, PtrType, NewPtr,
                                DAG.getConstant(PtrOff, PtrType));
           Alignment = MinAlign(Alignment, PtrOff);
@@ -3086,7 +3086,7 @@ SDOperand DAGCombiner::ReduceLoadWidth(SDNode *N) {
     MVT::ValueType PtrType = N0.getOperand(1).getValueType();
     // For big endian targets, we need to adjust the offset to the pointer to
     // load the correct bytes.
-    if (!TLI.isLittleEndian()) {
+    if (TLI.isBigEndian()) {
       unsigned LVTStoreBits = MVT::getStoreSizeInBits(N0.getValueType());
       unsigned EVTStoreBits = MVT::getStoreSizeInBits(EVT);
       ShAmt = LVTStoreBits - EVTStoreBits - ShAmt;
@@ -3460,7 +3460,7 @@ ConstantFoldBIT_CONVERTofBUILD_VECTOR(SDNode *BV, MVT::ValueType DstEltVT) {
     }
 
     // For big endian targets, swap the order of the pieces of each element.
-    if (!TLI.isLittleEndian())
+    if (TLI.isBigEndian())
       std::reverse(Ops.end()-NumOutputsPerInput, Ops.end());
   }
   MVT::ValueType VT = MVT::getVectorType(DstEltVT, Ops.size());
@@ -4386,7 +4386,7 @@ SDOperand DAGCombiner::visitSTORE(SDNode *N) {
           uint64_t Val = CFP->getValueAPF().convertToAPInt().getZExtValue();
           SDOperand Lo = DAG.getConstant(Val & 0xFFFFFFFF, MVT::i32);
           SDOperand Hi = DAG.getConstant(Val >> 32, MVT::i32);
-          if (!TLI.isLittleEndian()) std::swap(Lo, Hi);
+          if (TLI.isBigEndian()) std::swap(Lo, Hi);
 
           int SVOffset = ST->getSrcValueOffset();
           unsigned Alignment = ST->getAlignment();
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index ce5716b..beebc77 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -2117,7 +2117,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
           ExpandOp(Tmp2, Lo, Hi);
 
           // Big endian systems want the hi reg first.
-          if (!TLI.isLittleEndian())
+          if (TLI.isBigEndian())
             std::swap(Lo, Hi);
           
           if (Hi.Val)
@@ -2256,7 +2256,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
             uint64_t IntVal =CFP->getValueAPF().convertToAPInt().getZExtValue();
             SDOperand Lo = DAG.getConstant(uint32_t(IntVal), MVT::i32);
             SDOperand Hi = DAG.getConstant(uint32_t(IntVal >>32), MVT::i32);
-            if (!TLI.isLittleEndian()) std::swap(Lo, Hi);
+            if (TLI.isBigEndian()) std::swap(Lo, Hi);
 
             Lo = DAG.getStore(Tmp1, Lo, Tmp2, ST->getSrcValue(),
                               SVOffset, isVolatile, Alignment);
@@ -2356,7 +2356,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
           ExpandOp(Node->getOperand(1), Lo, Hi);
           IncrementSize = Hi.Val ? MVT::getSizeInBits(Hi.getValueType())/8 : 0;
 
-          if (!TLI.isLittleEndian())
+          if (TLI.isBigEndian())
             std::swap(Lo, Hi);
         }
 
@@ -5766,7 +5766,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
     // Remember that we legalized the chain.
     Hi = LegalizeOp(Hi);
     AddLegalizedOperand(Op.getValue(1), Hi.getValue(1));
-    if (!TLI.isLittleEndian())
+    if (TLI.isBigEndian())
       std::swap(Lo, Hi);
     break;
   }
@@ -5809,7 +5809,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){
 
       // Remember that we legalized the chain.
       AddLegalizedOperand(Op.getValue(1), LegalizeOp(TF));
-      if (!TLI.isLittleEndian())
+      if (TLI.isBigEndian())
         std::swap(Lo, Hi);
     } else {
       MVT::ValueType EVT = LD->getMemoryVT();
diff --git a/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp b/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp
index bb6a7f3..0461ea7 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeTypesExpand.cpp
@@ -293,7 +293,7 @@ void DAGTypeLegalizer::ExpandResult_LOAD(LoadSDNode *N,
                      Hi.getValue(1));
 
     // Handle endianness of the load.
-    if (!TLI.isLittleEndian())
+    if (TLI.isBigEndian())
       std::swap(Lo, Hi);
   } else if (MVT::getSizeInBits(N->getMemoryVT()) <= MVT::getSizeInBits(NVT)) {
     MVT::ValueType EVT = N->getMemoryVT();
@@ -1076,7 +1076,7 @@ SDOperand DAGTypeLegalizer::ExpandOperand_STORE(StoreSDNode *N, unsigned OpNo) {
     GetExpandedOp(N->getValue(), Lo, Hi);
     IncrementSize = MVT::getSizeInBits(Hi.getValueType())/8;
 
-    if (!TLI.isLittleEndian())
+    if (TLI.isBigEndian())
       std::swap(Lo, Hi);
 
     Lo = DAG.getStore(Ch, Lo, Ptr, N->getSrcValue(),