A quick nm audit turned up several fixed tables and objects that were

marked read-write. Use const so that they can be allocated in a
read-only segment.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48800 91177308-0d34-0410-b5e6-96231b3b80d8

13 files changed, 30 insertions, 27 deletions

diff --git a/include/llvm/CodeGen/MachineModuleInfo.h b/include/llvm/CodeGen/MachineModuleInfo.h
index 8d0a34b..2cd4e23 100644
--- a/include/llvm/CodeGen/MachineModuleInfo.h
+++ b/include/llvm/CodeGen/MachineModuleInfo.h
@@ -265,7 +265,7 @@ public:
   
   /// getAnchorString - Return a string used to label this descriptor's anchor.
   ///
-  static const char *AnchorString;
+  static const char *const AnchorString;
   virtual const char *getAnchorString() const;
     
 #ifndef NDEBUG
@@ -664,7 +664,7 @@ public:
   
   /// getAnchorString - Return a string used to label this descriptor's anchor.
   ///
-  static const char *AnchorString;
+  static const char *const AnchorString;
   virtual const char *getAnchorString() const;
     
 #ifndef NDEBUG
@@ -701,7 +701,7 @@ public:
   
   /// getAnchorString - Return a string used to label this descriptor's anchor.
   ///
-  static const char *AnchorString;
+  static const char *const AnchorString;
   virtual const char *getAnchorString() const;
     
 #ifndef NDEBUG
diff --git a/include/llvm/Target/TargetAsmInfo.h b/include/llvm/Target/TargetAsmInfo.h
index e55c243..2f54696 100644
--- a/include/llvm/Target/TargetAsmInfo.h
+++ b/include/llvm/Target/TargetAsmInfo.h
@@ -388,7 +388,7 @@ namespace llvm {
 
     //===--- CBE Asm Translation Table -----------------------------------===//
 
-    const char** AsmTransCBE; // Defaults to empty
+    const char *const *AsmTransCBE; // Defaults to empty
 
   public:
     TargetAsmInfo();
@@ -664,7 +664,7 @@ namespace llvm {
     const char *getDwarfExceptionSection() const {
       return DwarfExceptionSection;
     }
-    const char** getAsmCBE() const {
+    const char *const *getAsmCBE() const {
       return AsmTransCBE;
     }
   };
diff --git a/include/llvm/Target/TargetInstrItineraries.h b/include/llvm/Target/TargetInstrItineraries.h
index e4322a7..dbf2b65 100644
--- a/include/llvm/Target/TargetInstrItineraries.h
+++ b/include/llvm/Target/TargetInstrItineraries.h
@@ -47,14 +47,15 @@ struct InstrItinerary {
 // used by a target.
 //
 struct InstrItineraryData {
-  InstrStage     *Stages;         // Array of stages selected
-  InstrItinerary *Itineratries;   // Array of itineraries selected
+  const InstrStage     *Stages;         // Array of stages selected
+  const InstrItinerary *Itineratries;   // Array of itineraries selected
 
 //
 // Ctors.
 //
   InstrItineraryData() : Stages(0), Itineratries(0) {}
-  InstrItineraryData(InstrStage *S, InstrItinerary *I) : Stages(S), Itineratries(I) {}
+  InstrItineraryData(const InstrStage *S, const InstrItinerary *I)
+    : Stages(S), Itineratries(I) {}
   
   //
   // isEmpty - Returns true if there are no itineraries.
@@ -64,7 +65,7 @@ struct InstrItineraryData {
   //
   // begin - Return the first stage of the itinerary.
   // 
-  inline InstrStage *begin(unsigned ItinClassIndx) const {
+  inline const InstrStage *begin(unsigned ItinClassIndx) const {
     unsigned StageIdx = Itineratries[ItinClassIndx].First;
     return Stages + StageIdx;
   }
@@ -72,7 +73,7 @@ struct InstrItineraryData {
   //
   // end - Return the last+1 stage of the itinerary.
   // 
-  inline InstrStage *end(unsigned ItinClassIndx) const {
+  inline const InstrStage *end(unsigned ItinClassIndx) const {
     unsigned StageIdx = Itineratries[ItinClassIndx].Last;
     return Stages + StageIdx;
   }
diff --git a/lib/CodeGen/MachineModuleInfo.cpp b/lib/CodeGen/MachineModuleInfo.cpp
index 6d285bd..2446bff 100644
--- a/lib/CodeGen/MachineModuleInfo.cpp
+++ b/lib/CodeGen/MachineModuleInfo.cpp
@@ -670,7 +670,7 @@ const char *CompileUnitDesc::getTypeString() const {
 
 /// getAnchorString - Return a string used to label this descriptor's anchor.
 ///
-const char *CompileUnitDesc::AnchorString = "llvm.dbg.compile_units";
+const char *const CompileUnitDesc::AnchorString = "llvm.dbg.compile_units";
 const char *CompileUnitDesc::getAnchorString() const {
   return AnchorString;
 }
@@ -1120,7 +1120,7 @@ const char *GlobalVariableDesc::getTypeString() const {
 
 /// getAnchorString - Return a string used to label this descriptor's anchor.
 ///
-const char *GlobalVariableDesc::AnchorString = "llvm.dbg.global_variables";
+const char *const GlobalVariableDesc::AnchorString = "llvm.dbg.global_variables";
 const char *GlobalVariableDesc::getAnchorString() const {
   return AnchorString;
 }
@@ -1174,7 +1174,7 @@ const char *SubprogramDesc::getTypeString() const {
 
 /// getAnchorString - Return a string used to label this descriptor's anchor.
 ///
-const char *SubprogramDesc::AnchorString = "llvm.dbg.subprograms";
+const char *const SubprogramDesc::AnchorString = "llvm.dbg.subprograms";
 const char *SubprogramDesc::getAnchorString() const {
   return AnchorString;
 }
diff --git a/lib/CodeGen/PseudoSourceValue.cpp b/lib/CodeGen/PseudoSourceValue.cpp
index 5c5b1d6..c62e49a 100644
--- a/lib/CodeGen/PseudoSourceValue.cpp
+++ b/lib/CodeGen/PseudoSourceValue.cpp
@@ -29,7 +29,7 @@ namespace llvm {
   const PseudoSourceValue *PseudoSourceValue::getJumpTable()
   { return &(*PSVs)[4]; }
 
-  static const char *PSVNames[] = {
+  static const char *const PSVNames[] = {
     "FixedStack",
     "Stack",
     "GOT",
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index 94d3a6d..048ee2c 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -221,8 +221,8 @@ void ScheduleDAG::ComputeLatency(SUnit *SU) {
     if (SU->Node->isTargetOpcode()) {
       unsigned SchedClass =
         TII->get(SU->Node->getTargetOpcode()).getSchedClass();
-      InstrStage *S = InstrItins.begin(SchedClass);
-      InstrStage *E = InstrItins.end(SchedClass);
+      const InstrStage *S = InstrItins.begin(SchedClass);
+      const InstrStage *E = InstrItins.end(SchedClass);
       for (; S != E; ++S)
         SU->Latency += S->Cycles;
     }
@@ -230,8 +230,8 @@ void ScheduleDAG::ComputeLatency(SUnit *SU) {
       SDNode *FNode = SU->FlaggedNodes[i];
       if (FNode->isTargetOpcode()) {
         unsigned SchedClass =TII->get(FNode->getTargetOpcode()).getSchedClass();
-        InstrStage *S = InstrItins.begin(SchedClass);
-        InstrStage *E = InstrItins.end(SchedClass);
+        const InstrStage *S = InstrItins.begin(SchedClass);
+        const InstrStage *E = InstrItins.end(SchedClass);
         for (; S != E; ++S)
           SU->Latency += S->Cycles;
       }
diff --git a/lib/Support/APInt.cpp b/lib/Support/APInt.cpp
index a853b92..cd95085 100644
--- a/lib/Support/APInt.cpp
+++ b/lib/Support/APInt.cpp
@@ -1971,7 +1971,7 @@ void APInt::fromString(uint32_t numbits, const char *str, uint32_t slen,
 std::string APInt::toString(uint8_t radix, bool wantSigned) const {
   assert((radix == 10 || radix == 8 || radix == 16 || radix == 2) &&
          "Radix should be 2, 8, 10, or 16!");
-  static const char *digits[] = { 
+  static const char *const digits[] = { 
     "0","1","2","3","4","5","6","7","8","9","A","B","C","D","E","F" 
   };
   std::string result;
diff --git a/lib/Support/CommandLine.cpp b/lib/Support/CommandLine.cpp
index 4868752..b3f32e8 100644
--- a/lib/Support/CommandLine.cpp
+++ b/lib/Support/CommandLine.cpp
@@ -267,7 +267,7 @@ static bool EatsUnboundedNumberOfValues(const Option *O) {
 static void ParseCStringVector(std::vector<char *> &output,
                                const char *input) {
   // Characters which will be treated as token separators:
-  static const char *delims = " \v\f\t\r\n";
+  static const char *const delims = " \v\f\t\r\n";
 
   std::string work (input);
   // Skip past any delims at head of input string.
diff --git a/lib/Target/ARM/ARMTargetAsmInfo.cpp b/lib/Target/ARM/ARMTargetAsmInfo.cpp
index 3e7b69f..65947fb 100644
--- a/lib/Target/ARM/ARMTargetAsmInfo.cpp
+++ b/lib/Target/ARM/ARMTargetAsmInfo.cpp
@@ -17,7 +17,8 @@
 #include <cctype>
 using namespace llvm;
 
-static const char* arm_asm_table[] = {"{r0}", "r0",
+static const char *const arm_asm_table[] = {
+                                      "{r0}", "r0",
                                       "{r1}", "r1",
                                       "{r2}", "r2",
                                       "{r3}", "r3",
diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp
index eb7d585..24ac8f9 100644
--- a/lib/Target/CBackend/CBackend.cpp
+++ b/lib/Target/CBackend/CBackend.cpp
@@ -2825,7 +2825,7 @@ std::string CWriter::InterpretASMConstraint(InlineAsm::ConstraintInfo& c) {
 
   assert(c.Codes.size() == 1 && "Too many asm constraint codes to handle");
 
-  const char** table = 0;
+  const char *const *table = 0;
   
   //Grab the translation table from TargetAsmInfo if it exists
   if (!TAsm) {
diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 20b0d2a..0711313 100644
--- a/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -860,7 +860,7 @@ bool DarwinAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
 
 
 bool DarwinAsmPrinter::doInitialization(Module &M) {
-  static const char *CPUDirectives[] = {
+  static const char *const CPUDirectives[] = {
     "",
     "ppc",
     "ppc601",
diff --git a/lib/Target/X86/X86TargetAsmInfo.cpp b/lib/Target/X86/X86TargetAsmInfo.cpp
index 43948ec..390c5a6 100644
--- a/lib/Target/X86/X86TargetAsmInfo.cpp
+++ b/lib/Target/X86/X86TargetAsmInfo.cpp
@@ -25,7 +25,8 @@
 using namespace llvm;
 using namespace llvm::dwarf;
 
-static const char* x86_asm_table[] = {"{si}", "S",
+static const char *const x86_asm_table[] = {
+                                      "{si}", "S",
                                       "{di}", "D",
                                       "{ax}", "a",
                                       "{cx}", "c",
diff --git a/utils/TableGen/SubtargetEmitter.cpp b/utils/TableGen/SubtargetEmitter.cpp
index 5e7688a..a0dc967 100644
--- a/utils/TableGen/SubtargetEmitter.cpp
+++ b/utils/TableGen/SubtargetEmitter.cpp
@@ -83,7 +83,7 @@ void SubtargetEmitter::FeatureKeyValues(std::ostream &OS) {
 
   // Begin feature table
   OS << "// Sorted (by key) array of values for CPU features.\n"
-     << "static llvm::SubtargetFeatureKV FeatureKV[] = {\n";
+     << "static const llvm::SubtargetFeatureKV FeatureKV[] = {\n";
   
   // For each feature
   for (unsigned i = 0, N = FeatureList.size(); i < N; ++i) {
@@ -269,7 +269,7 @@ void SubtargetEmitter::EmitStageData(std::ostream &OS,
   if (ProcItinList.size() < 2) return;
 
   // Begin stages table
-  OS << "static llvm::InstrStage Stages[] = {\n"
+  OS << "static const llvm::InstrStage Stages[] = {\n"
         "  { 0, 0 }, // No itinerary\n";
         
   unsigned ItinEnum = 1;
@@ -362,7 +362,7 @@ void SubtargetEmitter::EmitProcessorData(std::ostream &OS,
 
     // Begin processor itinerary table
     OS << "\n";
-    OS << "static llvm::InstrItinerary " << Name << "[] = {\n";
+    OS << "static const llvm::InstrItinerary " << Name << "[] = {\n";
     
     // For each itinerary class
     std::vector<InstrItinerary> &ItinList = *ProcListIter++;