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author | Alkis Evlogimenos <alkis@evlogimenos.com> | 2004-01-07 05:31:12 +0000 |
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committer | Alkis Evlogimenos <alkis@evlogimenos.com> | 2004-01-07 05:31:12 +0000 |
commit | 1283d86b63a424be993dffa25616567376bced1e (patch) | |
tree | 1c393f4140c6dd179fd1ec120cc1d4e936ae5b43 | |
parent | 75ca6a3e828332de32caac572275e889a2848bf0 (diff) | |
download | external_llvm-1283d86b63a424be993dffa25616567376bced1e.zip external_llvm-1283d86b63a424be993dffa25616567376bced1e.tar.gz external_llvm-1283d86b63a424be993dffa25616567376bced1e.tar.bz2 |
Minor cleanups.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@10711 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/RegAllocLinearScan.cpp | 32 |
1 files changed, 3 insertions, 29 deletions
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp index 49e33d8..4897be4 100644 --- a/lib/CodeGen/RegAllocLinearScan.cpp +++ b/lib/CodeGen/RegAllocLinearScan.cpp @@ -34,17 +34,15 @@ namespace { Statistic<> numReloaded("ra-linearscan", "Number of registers reloaded"); class RA : public MachineFunctionPass { - public: - typedef std::vector<const LiveIntervals::Interval*> IntervalPtrs; - private: MachineFunction* mf_; const TargetMachine* tm_; const MRegisterInfo* mri_; - MachineBasicBlock* currentMbb_; + MachineFunction::iterator currentMbb_; MachineBasicBlock::iterator currentInstr_; typedef LiveIntervals::Intervals Intervals; const Intervals* li_; + typedef std::vector<const LiveIntervals::Interval*> IntervalPtrs; IntervalPtrs active_, inactive_; typedef std::vector<unsigned> Regs; @@ -57,9 +55,6 @@ namespace { unsigned regUse_[MRegisterInfo::FirstVirtualRegister]; unsigned regUseBackup_[MRegisterInfo::FirstVirtualRegister]; - typedef LiveIntervals::MachineBasicBlockPtrs MachineBasicBlockPtrs; - MachineBasicBlockPtrs mbbs_; - typedef std::map<unsigned, unsigned> Virt2PhysMap; Virt2PhysMap v2pMap_; @@ -204,30 +199,11 @@ bool RA::runOnMachineFunction(MachineFunction &fn) { active_.clear(); inactive_.clear(); - mbbs_ = getAnalysis<LiveIntervals>().getOrderedMachineBasicBlockPtrs(); v2pMap_.clear(); v2ssMap_.clear(); memset(regUse_, 0, sizeof(regUse_)); memset(regUseBackup_, 0, sizeof(regUseBackup_)); - DEBUG( - unsigned i = 0; - for (MachineBasicBlockPtrs::iterator - mbbi = mbbs_.begin(), mbbe = mbbs_.end(); - mbbi != mbbe; ++mbbi) { - MachineBasicBlock* mbb = *mbbi; - std::cerr << mbb->getBasicBlock()->getName() << '\n'; - for (MachineBasicBlock::iterator - ii = mbb->begin(), ie = mbb->end(); - ii != ie; ++ii) { - MachineInstr* instr = *ii; - - std::cerr << i++ << "\t"; - instr->print(std::cerr, *tm_); - } - } - ); - // FIXME: this will work only for the X86 backend. I need to // device an algorthm to select the minimal (considering register // aliasing) number of temp registers to reserve so that we have 2 @@ -316,10 +292,8 @@ bool RA::runOnMachineFunction(MachineFunction &fn) { DEBUG(printVirt2PhysMap()); DEBUG(std::cerr << "Rewrite machine code:\n"); - for (MachineBasicBlockPtrs::iterator - mbbi = mbbs_.begin(), mbbe = mbbs_.end(); mbbi != mbbe; ++mbbi) { + for (currentMbb_ = mf_->begin(); currentMbb_ != mf_->end(); ++currentMbb_) { instrAdded_ = 0; - currentMbb_ = *mbbi; for (currentInstr_ = currentMbb_->begin(); currentInstr_ != currentMbb_->end(); ++currentInstr_) { |