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authorDan Gohman <gohman@apple.com>2010-03-23 22:44:42 +0000
committerDan Gohman <gohman@apple.com>2010-03-23 22:44:42 +0000
commit1296c8c5a5aa965e377f011b4b3d742b3a80f9f8 (patch)
tree69487021d064bab0a63ee536e2b75d42cb8456bd
parent3f428d0fd50a5947cb05cf6cc2d5a454e429b13c (diff)
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Revert 99335. getTypeToExpandTo's iterative behavior is actually
needed here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99339 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--include/llvm/Target/TargetLowering.h21
-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp5
2 files changed, 23 insertions, 3 deletions
diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
index bb4168d..da0f686 100644
--- a/include/llvm/Target/TargetLowering.h
+++ b/include/llvm/Target/TargetLowering.h
@@ -268,6 +268,27 @@ public:
return MVT(MVT::Other); // Not reached
}
+ /// getTypeToExpandTo - For types supported by the target, this is an
+ /// identity function. For types that must be expanded (i.e. integer types
+ /// that are larger than the largest integer register or illegal floating
+ /// point types), this returns the largest legal type it will be expanded to.
+ EVT getTypeToExpandTo(LLVMContext &Context, EVT VT) const {
+ assert(!VT.isVector());
+ while (true) {
+ switch (getTypeAction(Context, VT)) {
+ case Legal:
+ return VT;
+ case Expand:
+ VT = getTypeToTransformTo(Context, VT);
+ break;
+ default:
+ assert(false && "Type is not legal nor is it to be expanded!");
+ return VT;
+ }
+ }
+ return VT;
+ }
+
/// getVectorTypeBreakdown - Vector types are broken down into some number of
/// legal first class types. For example, EVT::v8f32 maps to 2 EVT::v4f32
/// with Altivec or SSE1, or 8 promoted EVT::f64 values with the X86 FP stack.
diff --git a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 1092813..48f64c3 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -1021,7 +1021,7 @@ void DAGTypeLegalizer::ExpandShiftByConstant(SDNode *N, unsigned Amt,
Hi = InL;
} else if (Amt == 1 &&
TLI.isOperationLegalOrCustom(ISD::ADDC,
- TLI.getTypeToTransformTo(*DAG.getContext(), NVT))) {
+ TLI.getTypeToExpandTo(*DAG.getContext(), NVT))) {
// Emit this X << 1 as X+X.
SDVTList VTList = DAG.getVTList(NVT, MVT::Flag);
SDValue LoOps[2] = { InL, InL };
@@ -1263,8 +1263,7 @@ void DAGTypeLegalizer::ExpandIntRes_ADDSUB(SDNode *N,
bool hasCarry =
TLI.isOperationLegalOrCustom(N->getOpcode() == ISD::ADD ?
ISD::ADDC : ISD::SUBC,
- TLI.getTypeToTransformTo(*DAG.getContext(),
- NVT));
+ TLI.getTypeToExpandTo(*DAG.getContext(), NVT));
if (hasCarry) {
SDVTList VTList = DAG.getVTList(NVT, MVT::Flag);