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author | Eric Christopher <echristo@apple.com> | 2011-02-16 01:10:03 +0000 |
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committer | Eric Christopher <echristo@apple.com> | 2011-02-16 01:10:03 +0000 |
commit | 169e1552e748348b033fb6817df4bffc345e5583 (patch) | |
tree | 7c722c07d83887b9bf49eac9ad6bdcad915f227f | |
parent | f621e3b6d633ac50ced73aafa31463237ae9f4f4 (diff) | |
download | external_llvm-169e1552e748348b033fb6817df4bffc345e5583.zip external_llvm-169e1552e748348b033fb6817df4bffc345e5583.tar.gz external_llvm-169e1552e748348b033fb6817df4bffc345e5583.tar.bz2 |
The change for PR9190 wasn't quite right. We need to avoid making the
transformation if we can't legally create a build vector of the correct
type. Check that we can make the transformation first, and add a TODO to
refactor this code with similar cases.
Fixes: PR9223 and rdar://9000350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125631 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 14 | ||||
-rw-r--r-- | test/CodeGen/X86/legalize-sub-zero-2.ll | 41 |
2 files changed, 53 insertions, 2 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index f452d6a..e213d72 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -1532,8 +1532,18 @@ SDValue DAGCombiner::visitSUB(SDNode *N) { } // fold (sub x, x) -> 0 - if (N0 == N1) - return DAG.getConstant(0, N->getValueType(0), LegalTypes); + // FIXME: Refactor this and xor and other similar operations together. + if (N0 == N1) { + if (!VT.isVector()) { + return DAG.getConstant(0, VT); + } else if (!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)){ + // Produce a vector of zeros. + SDValue El = DAG.getConstant(0, VT.getVectorElementType()); + std::vector<SDValue> Ops(VT.getVectorNumElements(), El); + return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), VT, + &Ops[0], Ops.size()); + } + } // fold (sub c1, c2) -> c1-c2 if (N0C && N1C) return DAG.FoldConstantArithmetic(ISD::SUB, VT, N0C, N1C); diff --git a/test/CodeGen/X86/legalize-sub-zero-2.ll b/test/CodeGen/X86/legalize-sub-zero-2.ll new file mode 100644 index 0000000..f02ca71 --- /dev/null +++ b/test/CodeGen/X86/legalize-sub-zero-2.ll @@ -0,0 +1,41 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin + +define fastcc void @foo(i32 %type) nounwind optsize { +entry: + switch i32 %type, label %bb26 [ + i32 33634, label %bb11 + i32 5121, label %bb27 + ] + +bb11: ; preds = %entry + br label %bb27 + +bb26: ; preds = %entry + unreachable + +bb27: ; preds = %bb11, %entry + %srcpb.0 = phi i32 [ 1, %bb11 ], [ 0, %entry ] + br i1 undef, label %bb348, label %bb30.lr.ph + +bb30.lr.ph: ; preds = %bb27 + %.sum743 = shl i32 %srcpb.0, 1 + %0 = mul i32 %srcpb.0, -2 + %.sum745 = add i32 %.sum743, %0 + br i1 undef, label %bb70, label %bb71 + +bb70: ; preds = %bb30.lr.ph + unreachable + +bb71: ; preds = %bb30.lr.ph + br i1 undef, label %bb92, label %bb80 + +bb80: ; preds = %bb71 + unreachable + +bb92: ; preds = %bb71 + %1 = getelementptr inbounds i8* undef, i32 %.sum745 + unreachable + +bb348: ; preds = %bb27 + ret void +} |