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authorChris Lattner <sabre@nondot.org>2003-06-03 15:28:40 +0000
committerChris Lattner <sabre@nondot.org>2003-06-03 15:28:40 +0000
commit17035c0edf5463fd9edb8496502f4c5a0dc1d7ab (patch)
tree83f0d692a8a697e5ec37887ea8a8d17064b07c46
parente14ccafe25433606afcdbd15d546ef3e0b091dad (diff)
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Remove noncopyableV base classes, as they were confusing the doxygen documentation,
making it harder to read. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6575 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--include/llvm/Target/TargetCacheInfo.h5
-rw-r--r--include/llvm/Target/TargetMachine.h6
-rw-r--r--include/llvm/Target/TargetOptInfo.h11
-rw-r--r--include/llvm/Target/TargetRegInfo.h7
4 files changed, 19 insertions, 10 deletions
diff --git a/include/llvm/Target/TargetCacheInfo.h b/include/llvm/Target/TargetCacheInfo.h
index d83aac7..5eb9fde 100644
--- a/include/llvm/Target/TargetCacheInfo.h
+++ b/include/llvm/Target/TargetCacheInfo.h
@@ -10,8 +10,10 @@
#include "Support/DataTypes.h"
class TargetMachine;
-struct TargetCacheInfo : public NonCopyableV {
+struct TargetCacheInfo {
const TargetMachine &target;
+ TargetCacheInfo(const TargetCacheInfo&); // DO NOT IMPLEMENT
+ void operator=(const TargetCacheInfo&); // DO NOT IMPLEMENT
protected:
unsigned int numLevels;
std::vector<unsigned short> cacheLineSizes;
@@ -22,6 +24,7 @@ public:
TargetCacheInfo(const TargetMachine& tgt) : target(tgt) {
Initialize();
}
+ virtual ~TargetCacheInfo() {}
// Default parameters are:
// NumLevels = 2
diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h
index 041a724..09bfca7 100644
--- a/include/llvm/Target/TargetMachine.h
+++ b/include/llvm/Target/TargetMachine.h
@@ -28,10 +28,12 @@ class Pass;
/// the target machine. All target-specific information should be accessible
/// through this interface.
///
-class TargetMachine : public NonCopyableV {
+class TargetMachine {
const std::string Name;
- const TargetData DataLayout; // Calculates type size & alignment
+ const TargetData DataLayout; // Calculates type size & alignment
+ TargetMachine(const TargetMachine&); // DO NOT IMPLEMENT
+ void operator=(const TargetMachine&); // DO NOT IMPLEMENT
protected:
TargetMachine(const std::string &name, // Can only create subclasses...
bool LittleEndian = false,
diff --git a/include/llvm/Target/TargetOptInfo.h b/include/llvm/Target/TargetOptInfo.h
index 295895e..658932e 100644
--- a/include/llvm/Target/TargetOptInfo.h
+++ b/include/llvm/Target/TargetOptInfo.h
@@ -1,21 +1,24 @@
//===-- llvm/Target/TargetOptInfo.h ------------------------------*- C++ -*-==//
//
+// FIXME: ADD A COMMENT DESCRIBING THIS FILE!
//
//===----------------------------------------------------------------------===//
#ifndef LLVM_TARGET_TARGETOPTINFO_H
#define LLVM_TARGET_TARGETOPTINFO_H
-#include "Support/DataTypes.h"
+class MachineInstr;
class TargetMachine;
-struct TargetOptInfo : public NonCopyableV {
+struct TargetOptInfo {
const TargetMachine &target;
+ TargetOptInfo(const TargetOptInfo &); // DO NOT IMPLEMENT
+ void operator=(const TargetOptInfo &); // DO NOT IMPLEMENT
public:
- TargetOptInfo(const TargetMachine& tgt): target(tgt) { }
+ TargetOptInfo(const TargetMachine &TM) : target(TM) { }
- virtual bool IsUselessCopy (const MachineInstr* MI) const = 0;
+ virtual bool IsUselessCopy(const MachineInstr* MI) const = 0;
};
#endif
diff --git a/include/llvm/Target/TargetRegInfo.h b/include/llvm/Target/TargetRegInfo.h
index 29e10d3..7808efc 100644
--- a/include/llvm/Target/TargetRegInfo.h
+++ b/include/llvm/Target/TargetRegInfo.h
@@ -8,7 +8,6 @@
#ifndef LLVM_TARGET_TARGETREGINFO_H
#define LLVM_TARGET_TARGETREGINFO_H
-#include "Support/NonCopyable.h"
#include "Support/hash_map"
#include <string>
@@ -56,7 +55,9 @@ public:
//---------------------------------------------------------------------------
/// TargetRegInfo - Interface to register info of target machine
///
-class TargetRegInfo : public NonCopyableV {
+class TargetRegInfo {
+ TargetRegInfo(const TargetRegInfo &); // DO NOT IMPLEMENT
+ void operator=(const TargetRegInfo &); // DO NOT IMPLEMENT
protected:
// A vector of all machine register classes
//
@@ -71,7 +72,7 @@ public:
static int getInvalidRegNum() { return -1; }
TargetRegInfo(const TargetMachine& tgt) : target(tgt) { }
- ~TargetRegInfo() {
+ virtual ~TargetRegInfo() {
for (unsigned i = 0, e = MachineRegClassArr.size(); i != e; ++i)
delete MachineRegClassArr[i];
}