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authorReed Kotler <rkotler@mips.com>2013-11-05 21:39:57 +0000
committerReed Kotler <rkotler@mips.com>2013-11-05 21:39:57 +0000
commit1fa282d63538477d686015ad1883fa44d5e12605 (patch)
tree7c0fb5a0f26f73a300c3eaf60651348eab14124a
parentf635ab8eabb06a41fa791d897ebf32eb338688a0 (diff)
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Cleanup getUserOffset. Issues related to inline assembler length and
alignment will be handled differently than in ARM constant islands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194096 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/Mips/MipsConstantIslandPass.cpp17
1 files changed, 1 insertions, 16 deletions
diff --git a/lib/Target/Mips/MipsConstantIslandPass.cpp b/lib/Target/Mips/MipsConstantIslandPass.cpp
index b15ec06..36b5314 100644
--- a/lib/Target/Mips/MipsConstantIslandPass.cpp
+++ b/lib/Target/Mips/MipsConstantIslandPass.cpp
@@ -766,23 +766,8 @@ void MipsConstantIslands::updateForInsertedWaterBlock
WaterList.insert(IP, NewBB);
}
-/// getUserOffset - Compute the offset of U.MI as seen by the hardware
-/// displacement computation. Update U.KnownAlignment to match its current
-/// basic block location.
unsigned MipsConstantIslands::getUserOffset(CPUser &U) const {
- unsigned UserOffset = getOffsetOf(U.MI);
- const BasicBlockInfo &BBI = BBInfo[U.MI->getParent()->getNumber()];
- unsigned KnownBits = BBI.internalKnownBits();
-
- // The value read from PC is offset from the actual instruction address.
-
-
- // Because of inline assembly, we may not know the alignment (mod 4) of U.MI.
- // Make sure U.getMaxDisp() returns a constrained range.
- U.KnownAlignment = (KnownBits >= 2);
-
-
- return UserOffset;
+ return getOffsetOf(U.MI);
}
/// Split the basic block containing MI into two blocks, which are joined by