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| author | Bill Wendling <isanbard@gmail.com> | 2007-03-05 23:09:45 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2007-03-05 23:09:45 +0000 |
| commit | 229baffc4e07526176064ca534c3654322c2d3c4 (patch) | |
| tree | 7c339a615f1583cba7a2c10c52c6e35448474a6e | |
| parent | 53201869cdb92cfe298126ea9e6f5b763038d494 (diff) | |
| download | external_llvm-229baffc4e07526176064ca534c3654322c2d3c4.zip external_llvm-229baffc4e07526176064ca534c3654322c2d3c4.tar.gz external_llvm-229baffc4e07526176064ca534c3654322c2d3c4.tar.bz2 | |
Add the emms intrinsic for MMX support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34938 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | include/llvm/IntrinsicsX86.td | 9 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrMMX.td | 5 | ||||
| -rw-r--r-- | test/CodeGen/X86/mmx-emms.ll | 11 |
3 files changed, 24 insertions, 1 deletions
diff --git a/include/llvm/IntrinsicsX86.td b/include/llvm/IntrinsicsX86.td index b757eaf..d512786 100644 --- a/include/llvm/IntrinsicsX86.td +++ b/include/llvm/IntrinsicsX86.td @@ -535,3 +535,12 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". Intrinsic<[llvm_void_ty, llvm_i32_ty, llvm_i32_ty], [IntrWriteMem]>; } + +//===----------------------------------------------------------------------===// +// MMX + +// Empty MMX state op. +let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". + def int_x86_mmx_emms : GCCBuiltin<"__builtin_ia32_emms">, + Intrinsic<[llvm_void_ty], [IntrWriteMem]>; +} diff --git a/lib/Target/X86/X86InstrMMX.td b/lib/Target/X86/X86InstrMMX.td index 104d8797..7f467b3 100644 --- a/lib/Target/X86/X86InstrMMX.td +++ b/lib/Target/X86/X86InstrMMX.td @@ -33,6 +33,10 @@ def IMPLICIT_DEF_VR64 : I<0, Pseudo, (ops VR64:$dst), def : Pat<(v4i16 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>; def : Pat<(v2i32 (undef)), (IMPLICIT_DEF_VR64)>, Requires<[HasMMX]>; +// EMMS +def EMMS : I<0x77, RawFrm, (ops), "emms", [(int_x86_mmx_emms)]>, TB, + Requires<[HasMMX]>; + // Move Instructions def MOVD64rr : I<0x6E, MRMSrcReg, (ops VR64:$dst, GR32:$src), "movd {$src, $dst|$dst, $src}", []>, TB, @@ -94,4 +98,3 @@ def MOVNTQ : I<0xE7, MRMDestMem, (ops i64mem:$dst, VR64:$src), def MASKMOVQ : I<0xF7, MRMDestMem, (ops VR64:$src, VR64:$mask), "maskmovq {$mask, $src|$src, $mask}", []>, TB, Requires<[HasMMX]>; - diff --git a/test/CodeGen/X86/mmx-emms.ll b/test/CodeGen/X86/mmx-emms.ll new file mode 100644 index 0000000..60ba84d --- /dev/null +++ b/test/CodeGen/X86/mmx-emms.ll @@ -0,0 +1,11 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx | grep emms +define void @foo() { +entry: + call void @llvm.x86.mmx.emms( ) + br label %return + +return: ; preds = %entry + ret void +} + +declare void @llvm.x86.mmx.emms() |