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| author | Jim Grosbach <grosbach@apple.com> | 2012-05-02 21:11:56 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2012-05-02 21:11:56 +0000 |
| commit | 2727930ab4ce260fef0487bc878c1cd4c3769cef (patch) | |
| tree | 8b199e3ff428b2264c840b1e849af6e3b96dbbcf | |
| parent | f657da2e4896732f306a9e62261418112e7337ce (diff) | |
| download | external_llvm-2727930ab4ce260fef0487bc878c1cd4c3769cef.zip external_llvm-2727930ab4ce260fef0487bc878c1cd4c3769cef.tar.gz external_llvm-2727930ab4ce260fef0487bc878c1cd4c3769cef.tar.bz2 | |
ARM: Add missing two-operand VBIC aliases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156019 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrNEON.td | 2 | ||||
| -rw-r--r-- | test/MC/ARM/neon-bitwise-encoding.s | 5 |
2 files changed, 7 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index 6132989..d504926 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -4308,6 +4308,7 @@ def VORRiv4i32 : N1ModImm<1, 0b000, {0,?,?,1}, 0, 1, 0, 1, // VBIC : Vector Bitwise Bit Clear (AND NOT) +let TwoOperandAliasConstraint = "$Vn = $Vd" in { def VBICd : N3VX<0, 0, 0b01, 0b0001, 0, 1, (outs DPR:$Vd), (ins DPR:$Vn, DPR:$Vm), N3RegFrm, IIC_VBINiD, "vbic", "$Vd, $Vn, $Vm", "", @@ -4318,6 +4319,7 @@ def VBICq : N3VX<0, 0, 0b01, 0b0001, 1, 1, (outs QPR:$Vd), "vbic", "$Vd, $Vn, $Vm", "", [(set QPR:$Vd, (v4i32 (and QPR:$Vn, (vnotq QPR:$Vm))))]>; +} def VBICiv4i16 : N1ModImm<1, 0b000, {1,0,?,1}, 0, 0, 1, 1, (outs DPR:$Vd), (ins nImmSplatI16:$SIMM, DPR:$src), diff --git a/test/MC/ARM/neon-bitwise-encoding.s b/test/MC/ARM/neon-bitwise-encoding.s index 1b4ca33..e8c1dd6 100644 --- a/test/MC/ARM/neon-bitwise-encoding.s +++ b/test/MC/ARM/neon-bitwise-encoding.s @@ -30,11 +30,16 @@ vbic q8, q8, q9 vbic.i32 d16, #0xFF000000 vbic.i32 q8, #0xFF000000 + vbic q10, q11 + vbic d9, d1 @ CHECK: vbic d16, d17, d16 @ encoding: [0xb0,0x01,0x51,0xf2] @ CHECK: vbic q8, q8, q9 @ encoding: [0xf2,0x01,0x50,0xf2] @ CHECK: vbic.i32 d16, #0xff000000 @ encoding: [0x3f,0x07,0xc7,0xf3] @ CHECK: vbic.i32 q8, #0xff000000 @ encoding: [0x7f,0x07,0xc7,0xf3] +@ CHECK: vbic q10, q10, q11 @ encoding: [0xf6,0x41,0x54,0xf2] +@ CHECK: vbic d9, d9, d1 @ encoding: [0x11,0x91,0x19,0xf2] + vorn d16, d17, d16 vorn q8, q8, q9 |