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author | Chris Lattner <sabre@nondot.org> | 2010-10-05 22:42:54 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2010-10-05 22:42:54 +0000 |
commit | 286997c7450040dcebf7c85a357af2416c2c1393 (patch) | |
tree | 458b777fe06950c8eda3dff8f91af53b20c028ad | |
parent | 01f9ea35a71b4efb00de8e4c9e9136c9c88f6273 (diff) | |
download | external_llvm-286997c7450040dcebf7c85a357af2416c2c1393.zip external_llvm-286997c7450040dcebf7c85a357af2416c2c1393.tar.gz external_llvm-286997c7450040dcebf7c85a357af2416c2c1393.tar.bz2 |
convert cmov mr patterns to use a multipattern. Death to redundancy
and verbosity
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115701 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86InstrCompiler.td | 122 |
1 files changed, 25 insertions, 97 deletions
diff --git a/lib/Target/X86/X86InstrCompiler.td b/lib/Target/X86/X86InstrCompiler.td index 2c0cbc0..28ccc49 100644 --- a/lib/Target/X86/X86InstrCompiler.td +++ b/lib/Target/X86/X86InstrCompiler.td @@ -850,104 +850,32 @@ def : Pat<(X86cmp GR64:$src1, 0), // Conditional moves with folded loads with operands swapped and conditions // inverted. -def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_B, EFLAGS), - (CMOVAE16rm GR16:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_B, EFLAGS), - (CMOVAE32rm GR32:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_AE, EFLAGS), - (CMOVB16rm GR16:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_AE, EFLAGS), - (CMOVB32rm GR32:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_E, EFLAGS), - (CMOVNE16rm GR16:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_E, EFLAGS), - (CMOVNE32rm GR32:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_NE, EFLAGS), - (CMOVE16rm GR16:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_NE, EFLAGS), - (CMOVE32rm GR32:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_BE, EFLAGS), - (CMOVA16rm GR16:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_BE, EFLAGS), - (CMOVA32rm GR32:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_A, EFLAGS), - (CMOVBErm16 GR16:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_A, EFLAGS), - (CMOVBErm32 GR32:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_L, EFLAGS), - (CMOVGE16rm GR16:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_L, EFLAGS), - (CMOVGE32rm GR32:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_GE, EFLAGS), - (CMOVL16rm GR16:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_GE, EFLAGS), - (CMOVL32rm GR32:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_LE, EFLAGS), - (CMOVG16rm GR16:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_LE, EFLAGS), - (CMOVG32rm GR32:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_G, EFLAGS), - (CMOVLE16rm GR16:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_G, EFLAGS), - (CMOVLE32rm GR32:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_P, EFLAGS), - (CMOVNP16rm GR16:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_P, EFLAGS), - (CMOVNP32rm GR32:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_NP, EFLAGS), - (CMOVP16rm GR16:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_NP, EFLAGS), - (CMOVP32rm GR32:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_S, EFLAGS), - (CMOVNS16rm GR16:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_S, EFLAGS), - (CMOVNS32rm GR32:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_NS, EFLAGS), - (CMOVS16rm GR16:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_NS, EFLAGS), - (CMOVS32rm GR32:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_O, EFLAGS), - (CMOVNO16rm GR16:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_O, EFLAGS), - (CMOVNO32rm GR32:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, X86_COND_NO, EFLAGS), - (CMOVO16rm GR16:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, X86_COND_NO, EFLAGS), - (CMOVO32rm GR32:$src2, addr:$src1)>; - -def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_B, EFLAGS), - (CMOVAE64rm GR64:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_AE, EFLAGS), - (CMOVB64rm GR64:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_E, EFLAGS), - (CMOVNE64rm GR64:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_NE, EFLAGS), - (CMOVE64rm GR64:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_BE, EFLAGS), - (CMOVA64rm GR64:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_A, EFLAGS), - (CMOVBErm64 GR64:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_L, EFLAGS), - (CMOVGE64rm GR64:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_GE, EFLAGS), - (CMOVL64rm GR64:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_LE, EFLAGS), - (CMOVG64rm GR64:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_G, EFLAGS), - (CMOVLE64rm GR64:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_P, EFLAGS), - (CMOVNP64rm GR64:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_NP, EFLAGS), - (CMOVP64rm GR64:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_S, EFLAGS), - (CMOVNS64rm GR64:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_NS, EFLAGS), - (CMOVS64rm GR64:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_O, EFLAGS), - (CMOVNO64rm GR64:$src2, addr:$src1)>; -def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, X86_COND_NO, EFLAGS), - (CMOVO64rm GR64:$src2, addr:$src1)>; +multiclass CMOVmr<PatLeaf InvertedCond, Instruction Inst16, Instruction Inst32, + Instruction Inst64> { + def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, InvertedCond, EFLAGS), + (Inst16 GR16:$src2, addr:$src1)>; + def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, InvertedCond, EFLAGS), + (Inst32 GR32:$src2, addr:$src1)>; + def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, InvertedCond, EFLAGS), + (Inst64 GR64:$src2, addr:$src1)>; +} +defm CMOVAEmr : CMOVmr<X86_COND_B , CMOVAE16rm, CMOVAE32rm, CMOVAE64rm>; +defm CMOVBmr : CMOVmr<X86_COND_AE, CMOVB16rm , CMOVB32rm , CMOVB64rm>; +defm CMOVNEmr : CMOVmr<X86_COND_E , CMOVNE16rm, CMOVNE32rm, CMOVNE64rm>; +defm CMOVEmr : CMOVmr<X86_COND_NE, CMOVE16rm , CMOVE32rm , CMOVE64rm>; +defm CMOVAmr : CMOVmr<X86_COND_BE, CMOVA16rm , CMOVA32rm , CMOVA64rm>; +defm CMOVBEmr : CMOVmr<X86_COND_A , CMOVBErm16, CMOVBErm32, CMOVBErm64>; +defm CMOVGEmr : CMOVmr<X86_COND_L , CMOVGE16rm, CMOVGE32rm, CMOVGE64rm>; +defm CMOVLmr : CMOVmr<X86_COND_GE, CMOVL16rm , CMOVL32rm , CMOVL64rm>; +defm CMOVGmr : CMOVmr<X86_COND_LE, CMOVG16rm , CMOVG32rm , CMOVG64rm>; +defm CMOVLEmr : CMOVmr<X86_COND_G , CMOVLE16rm, CMOVLE32rm, CMOVLE64rm>; +defm CMOVNPmr : CMOVmr<X86_COND_P , CMOVNP16rm, CMOVNP32rm, CMOVNP64rm>; +defm CMOVPmr : CMOVmr<X86_COND_NP, CMOVP16rm , CMOVP32rm , CMOVP64rm>; +defm CMOVNSmr : CMOVmr<X86_COND_S , CMOVNS16rm, CMOVNS32rm, CMOVNS64rm>; +defm CMOVSmr : CMOVmr<X86_COND_NS, CMOVS16rm , CMOVS32rm , CMOVS64rm>; +defm CMOVNOmr : CMOVmr<X86_COND_O , CMOVNO16rm, CMOVNO32rm, CMOVNO64rm>; +defm CMOVOmr : CMOVmr<X86_COND_NO, CMOVO16rm , CMOVO32rm , CMOVO64rm>; // zextload bool -> zextload byte def : Pat<(zextloadi8i1 addr:$src), (MOV8rm addr:$src)>; |