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author | Chris Lattner <sabre@nondot.org> | 2009-07-29 20:31:52 +0000 |
---|---|---|
committer | Chris Lattner <sabre@nondot.org> | 2009-07-29 20:31:52 +0000 |
commit | 2cfd52c507bd5790457a171eb9bcb39019cc6860 (patch) | |
tree | 32ee499ddd00d0df27a59cdd085b5afab4c6f632 | |
parent | 0531d04d002c6d9489b4d1a85f49734e5c27e6f7 (diff) | |
download | external_llvm-2cfd52c507bd5790457a171eb9bcb39019cc6860.zip external_llvm-2cfd52c507bd5790457a171eb9bcb39019cc6860.tar.gz external_llvm-2cfd52c507bd5790457a171eb9bcb39019cc6860.tar.bz2 |
Give getPointerRegClass() a "kind" value so that targets can
support multiple different pointer register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77501 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/llvm/Target/TargetRegisterInfo.h | 5 | ||||
-rw-r--r-- | lib/Target/ARM/ARMBaseRegisterInfo.cpp | 9 | ||||
-rw-r--r-- | lib/Target/ARM/ARMBaseRegisterInfo.h | 4 | ||||
-rw-r--r-- | lib/Target/CellSPU/SPURegisterInfo.cpp | 4 | ||||
-rw-r--r-- | lib/Target/CellSPU/SPURegisterInfo.h | 3 | ||||
-rw-r--r-- | lib/Target/MSP430/MSP430RegisterInfo.cpp | 8 | ||||
-rw-r--r-- | lib/Target/MSP430/MSP430RegisterInfo.h | 2 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCRegisterInfo.cpp | 6 | ||||
-rw-r--r-- | lib/Target/PowerPC/PPCRegisterInfo.h | 2 | ||||
-rw-r--r-- | lib/Target/X86/X86RegisterInfo.cpp | 9 | ||||
-rw-r--r-- | lib/Target/X86/X86RegisterInfo.h | 2 |
11 files changed, 28 insertions, 26 deletions
diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h index 9cd8489..9e57c0e 100644 --- a/include/llvm/Target/TargetRegisterInfo.h +++ b/include/llvm/Target/TargetRegisterInfo.h @@ -514,8 +514,9 @@ public: } /// getPointerRegClass - Returns a TargetRegisterClass used for pointer - /// values. - virtual const TargetRegisterClass *getPointerRegClass() const { + /// values. If a target supports multiple different pointer register classes, + /// kind specifies which one is indicated. + virtual const TargetRegisterClass *getPointerRegClass(unsigned Kind=0) const { assert(0 && "Target didn't implement getPointerRegClass!"); return 0; // Must return a value in order to compile with VS 2005 } diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/lib/Target/ARM/ARMBaseRegisterInfo.cpp index d315fce..8f0b3f3 100644 --- a/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -1,4 +1,4 @@ -//===- ARMBaseRegisterInfo.cpp - ARM Register Information -----------*- C++ -*-===// +//===- ARMBaseRegisterInfo.cpp - ARM Register Information -------*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -224,8 +224,8 @@ BitVector ARMBaseRegisterInfo::getReservedRegs(const MachineFunction &MF) const return Reserved; } -bool -ARMBaseRegisterInfo::isReservedReg(const MachineFunction &MF, unsigned Reg) const { +bool ARMBaseRegisterInfo::isReservedReg(const MachineFunction &MF, + unsigned Reg) const { switch (Reg) { default: break; case ARM::SP: @@ -243,7 +243,8 @@ ARMBaseRegisterInfo::isReservedReg(const MachineFunction &MF, unsigned Reg) cons return false; } -const TargetRegisterClass *ARMBaseRegisterInfo::getPointerRegClass() const { +const TargetRegisterClass * +ARMBaseRegisterInfo::getPointerRegClass(unsigned Kind) const { return &ARM::GPRRegClass; } diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.h b/lib/Target/ARM/ARMBaseRegisterInfo.h index 9165bbc..2d74fd7 100644 --- a/lib/Target/ARM/ARMBaseRegisterInfo.h +++ b/lib/Target/ARM/ARMBaseRegisterInfo.h @@ -1,4 +1,4 @@ -//===- ARMBaseRegisterInfo.h - ARM Register Information Impl --------*- C++ -*-===// +//===- ARMBaseRegisterInfo.h - ARM Register Information Impl ----*- C++ -*-===// // // The LLVM Compiler Infrastructure // @@ -74,7 +74,7 @@ public: BitVector getReservedRegs(const MachineFunction &MF) const; - const TargetRegisterClass *getPointerRegClass() const; + const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const; std::pair<TargetRegisterClass::iterator,TargetRegisterClass::iterator> getAllocationOrder(const TargetRegisterClass *RC, diff --git a/lib/Target/CellSPU/SPURegisterInfo.cpp b/lib/Target/CellSPU/SPURegisterInfo.cpp index 31c75eb..53d6ce0 100644 --- a/lib/Target/CellSPU/SPURegisterInfo.cpp +++ b/lib/Target/CellSPU/SPURegisterInfo.cpp @@ -219,8 +219,8 @@ SPURegisterInfo::getNumArgRegs() /// getPointerRegClass - Return the register class to use to hold pointers. /// This is used for addressing modes. -const TargetRegisterClass * SPURegisterInfo::getPointerRegClass() const -{ +const TargetRegisterClass * +SPURegisterInfo::getPointerRegClass(unsigned Kind) const { return &SPU::R32CRegClass; } diff --git a/lib/Target/CellSPU/SPURegisterInfo.h b/lib/Target/CellSPU/SPURegisterInfo.h index 5b6e9ec..0d3bbbe 100644 --- a/lib/Target/CellSPU/SPURegisterInfo.h +++ b/lib/Target/CellSPU/SPURegisterInfo.h @@ -43,7 +43,8 @@ namespace llvm { /// getPointerRegClass - Return the register class to use to hold pointers. /// This is used for addressing modes. - virtual const TargetRegisterClass *getPointerRegClass() const; + virtual const TargetRegisterClass * + getPointerRegClass(unsigned Kind = 0) const; //! Return the array of callee-saved registers virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF) const; diff --git a/lib/Target/MSP430/MSP430RegisterInfo.cpp b/lib/Target/MSP430/MSP430RegisterInfo.cpp index 6b2b555..d1401f5 100644 --- a/lib/Target/MSP430/MSP430RegisterInfo.cpp +++ b/lib/Target/MSP430/MSP430RegisterInfo.cpp @@ -46,7 +46,7 @@ MSP430RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { return CalleeSavedRegs; } -const TargetRegisterClass* const* +const TargetRegisterClass *const * MSP430RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const { static const TargetRegisterClass * const CalleeSavedRegClasses[] = { &MSP430::GR16RegClass, &MSP430::GR16RegClass, @@ -59,8 +59,7 @@ MSP430RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const { return CalleeSavedRegClasses; } -BitVector -MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const { +BitVector MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const { BitVector Reserved(getNumRegs()); // Mark 4 special registers as reserved. @@ -76,7 +75,8 @@ MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const { return Reserved; } -const TargetRegisterClass* MSP430RegisterInfo::getPointerRegClass() const { +const TargetRegisterClass * +MSP430RegisterInfo::getPointerRegClass(unsigned Kind) const { return &MSP430::GR16RegClass; } diff --git a/lib/Target/MSP430/MSP430RegisterInfo.h b/lib/Target/MSP430/MSP430RegisterInfo.h index a210e36..69007ab 100644 --- a/lib/Target/MSP430/MSP430RegisterInfo.h +++ b/lib/Target/MSP430/MSP430RegisterInfo.h @@ -40,7 +40,7 @@ public: getCalleeSavedRegClasses(const MachineFunction *MF = 0) const; BitVector getReservedRegs(const MachineFunction &MF) const; - const TargetRegisterClass* getPointerRegClass() const; + const TargetRegisterClass* getPointerRegClass(unsigned Kind = 0) const; bool hasFP(const MachineFunction &MF) const; bool hasReservedCallFrame(MachineFunction &MF) const; diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp index 6016eb4..b124e60 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -140,11 +140,11 @@ PPCRegisterInfo::PPCRegisterInfo(const PPCSubtarget &ST, /// getPointerRegClass - Return the register class to use to hold pointers. /// This is used for addressing modes. -const TargetRegisterClass *PPCRegisterInfo::getPointerRegClass() const { +const TargetRegisterClass * +PPCRegisterInfo::getPointerRegClass(unsigned Kind) const { if (Subtarget.isPPC64()) return &PPC::G8RCRegClass; - else - return &PPC::GPRCRegClass; + return &PPC::GPRCRegClass; } const unsigned* diff --git a/lib/Target/PowerPC/PPCRegisterInfo.h b/lib/Target/PowerPC/PPCRegisterInfo.h index ddaefdd..2b5ad14 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.h +++ b/lib/Target/PowerPC/PPCRegisterInfo.h @@ -37,7 +37,7 @@ public: /// getPointerRegClass - Return the register class to use to hold pointers. /// This is used for addressing modes. - virtual const TargetRegisterClass *getPointerRegClass() const; + virtual const TargetRegisterClass *getPointerRegClass(unsigned Kind=0) const; /// Code Generation virtual methods... const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const; diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index bf523dd..e5d563c 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -245,12 +245,11 @@ X86RegisterInfo::getMatchingSuperRegClass(const TargetRegisterClass *A, return 0; } -const TargetRegisterClass *X86RegisterInfo::getPointerRegClass() const { - const X86Subtarget *Subtarget = &TM.getSubtarget<X86Subtarget>(); - if (Subtarget->is64Bit()) +const TargetRegisterClass *X86RegisterInfo:: +getPointerRegClass(unsigned Kind) const { + if (TM.getSubtarget<X86Subtarget>().is64Bit()) return &X86::GR64RegClass; - else - return &X86::GR32RegClass; + return &X86::GR32RegClass; } const TargetRegisterClass * diff --git a/lib/Target/X86/X86RegisterInfo.h b/lib/Target/X86/X86RegisterInfo.h index 702e69d..f6c119d 100644 --- a/lib/Target/X86/X86RegisterInfo.h +++ b/lib/Target/X86/X86RegisterInfo.h @@ -102,7 +102,7 @@ public: /// getPointerRegClass - Returns a TargetRegisterClass used for pointer /// values. - const TargetRegisterClass *getPointerRegClass() const; + const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const; /// getCrossCopyRegClass - Returns a legal register class to copy a register /// in the specified class to or from. Returns NULL if it is possible to copy |