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author | Chad Rosier <mcrosier@apple.com> | 2012-05-11 17:41:06 +0000 |
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committer | Chad Rosier <mcrosier@apple.com> | 2012-05-11 17:41:06 +0000 |
commit | 2f6ae41f14af87d1019d771b101580381cdfc44f (patch) | |
tree | c41eae5bda6e39c4a9de103d152790026bef902a | |
parent | f4bd21c256f6aabdc13f54ff7bf5d69e8305302c (diff) | |
download | external_llvm-2f6ae41f14af87d1019d771b101580381cdfc44f.zip external_llvm-2f6ae41f14af87d1019d771b101580381cdfc44f.tar.gz external_llvm-2f6ae41f14af87d1019d771b101580381cdfc44f.tar.bz2 |
[fast-isel] Rather then assert (or segfault in a non-asserts build), fall back
to selection DAG isel if we're unable to handle a non-double multi-reg retval.
rdar://11430407
PR12796
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156622 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/ARMFastISel.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index f3d930f..f49a5d3 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -2014,8 +2014,7 @@ bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs, // Finally update the result. UpdateValueMap(I, ResultReg); - } else { - assert(RVLocs.size() == 1 &&"Can't handle non-double multi-reg retvals!"); + } else if (RVLocs.size() == 1) { EVT CopyVT = RVLocs[0].getValVT(); // Special handling for extended integers. @@ -2031,6 +2030,9 @@ bool ARMFastISel::FinishCall(MVT RetVT, SmallVectorImpl<unsigned> &UsedRegs, // Finally update the result. UpdateValueMap(I, ResultReg); + } else { + // Can't handle non-double multi-reg retvals. + return false; } } |