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author | Brian Gaeke <gaeke@uiuc.edu> | 2004-03-04 19:16:23 +0000 |
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committer | Brian Gaeke <gaeke@uiuc.edu> | 2004-03-04 19:16:23 +0000 |
commit | 323819e4e1e3573072e7dbd82b0ebd75b5df0648 (patch) | |
tree | 6dccce862eb949adb13ce1e46475e1e16fcd97d0 | |
parent | ce1e500e2f2e25da5164302af25573d828c4a11d (diff) | |
download | external_llvm-323819e4e1e3573072e7dbd82b0ebd75b5df0648.zip external_llvm-323819e4e1e3573072e7dbd82b0ebd75b5df0648.tar.gz external_llvm-323819e4e1e3573072e7dbd82b0ebd75b5df0648.tar.bz2 |
make -print-machineinstrs work for both SparcV9 and X86
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12122 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/llvm/Target/TargetMachineImpls.h | 4 | ||||
-rw-r--r-- | lib/Target/SparcV9/SparcV9TargetMachine.cpp | 4 | ||||
-rw-r--r-- | lib/Target/TargetMachine.cpp | 14 | ||||
-rw-r--r-- | lib/Target/X86/X86TargetMachine.cpp | 18 |
4 files changed, 30 insertions, 10 deletions
diff --git a/include/llvm/Target/TargetMachineImpls.h b/include/llvm/Target/TargetMachineImpls.h index a2488b5..a631b2d 100644 --- a/include/llvm/Target/TargetMachineImpls.h +++ b/include/llvm/Target/TargetMachineImpls.h @@ -16,6 +16,10 @@ #define LLVM_TARGET_TARGETMACHINEIMPLS_H namespace llvm { + /// Command line options shared between TargetMachine implementations - + /// these should go in their own header eventually. + /// + extern bool PrintMachineCode; class TargetMachine; class Module; diff --git a/lib/Target/SparcV9/SparcV9TargetMachine.cpp b/lib/Target/SparcV9/SparcV9TargetMachine.cpp index acd76fb..485a358 100644 --- a/lib/Target/SparcV9/SparcV9TargetMachine.cpp +++ b/lib/Target/SparcV9/SparcV9TargetMachine.cpp @@ -162,6 +162,10 @@ SparcV9TargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out PM.add(createInstructionSchedulingWithSSAPass(*this)); PM.add(getRegisterAllocator(*this)); + + if (PrintMachineCode) + PM.add(createMachineFunctionPrinterPass(&std::cerr)); + PM.add(createPrologEpilogInsertionPass()); if (!DisablePeephole) diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp index 2c8b796..82778d9 100644 --- a/lib/Target/TargetMachine.cpp +++ b/lib/Target/TargetMachine.cpp @@ -14,9 +14,23 @@ #include "llvm/Target/TargetMachine.h" #include "llvm/Type.h" #include "llvm/IntrinsicLowering.h" +#include "Support/CommandLine.h" using namespace llvm; //--------------------------------------------------------------------------- +// Command-line options that tend to be useful on more than one back-end. +// + +namespace llvm { + bool PrintMachineCode; +}; +namespace { + cl::opt<bool, true> PrintCode("print-machineinstrs", + cl::desc("Print generated machine code"), + cl::location(PrintMachineCode), cl::init(false)); +}; + +//--------------------------------------------------------------------------- // TargetMachine Class // TargetMachine::TargetMachine(const std::string &name, IntrinsicLowering *il, diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index 4886a11..31c5e57 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -25,8 +25,6 @@ using namespace llvm; namespace { - cl::opt<bool> PrintCode("print-machineinstrs", - cl::desc("Print generated machine code")); cl::opt<bool> NoPatternISel("disable-pattern-isel", cl::init(true), cl::desc("Use the 'simple' X86 instruction selector")); cl::opt<bool> NoSSAPeephole("disable-ssa-peephole", cl::init(true), @@ -79,18 +77,18 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM, PM.add(createX86SSAPeepholeOptimizerPass()); // Print the instruction selected machine code... - if (PrintCode) + if (PrintMachineCode) PM.add(createMachineFunctionPrinterPass(&std::cerr)); // Perform register allocation to convert to a concrete x86 representation PM.add(createRegisterAllocator()); - if (PrintCode) + if (PrintMachineCode) PM.add(createMachineFunctionPrinterPass(&std::cerr)); PM.add(createX86FloatingPointStackifierPass()); - if (PrintCode) + if (PrintMachineCode) PM.add(createMachineFunctionPrinterPass(&std::cerr)); // Insert prolog/epilog code. Eliminate abstract frame index references... @@ -98,7 +96,7 @@ bool X86TargetMachine::addPassesToEmitAssembly(PassManager &PM, PM.add(createX86PeepholeOptimizerPass()); - if (PrintCode) // Print the register-allocated code + if (PrintMachineCode) // Print the register-allocated code PM.add(createX86CodePrinterPass(std::cerr, *this)); if (!DisableOutput) @@ -138,18 +136,18 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) { // FIXME: Add SSA based peephole optimizer here. // Print the instruction selected machine code... - if (PrintCode) + if (PrintMachineCode) PM.add(createMachineFunctionPrinterPass(&std::cerr)); // Perform register allocation to convert to a concrete x86 representation PM.add(createRegisterAllocator()); - if (PrintCode) + if (PrintMachineCode) PM.add(createMachineFunctionPrinterPass(&std::cerr)); PM.add(createX86FloatingPointStackifierPass()); - if (PrintCode) + if (PrintMachineCode) PM.add(createMachineFunctionPrinterPass(&std::cerr)); // Insert prolog/epilog code. Eliminate abstract frame index references... @@ -157,7 +155,7 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) { PM.add(createX86PeepholeOptimizerPass()); - if (PrintCode) // Print the register-allocated code + if (PrintMachineCode) // Print the register-allocated code PM.add(createX86CodePrinterPass(std::cerr, TM)); } |