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authorEvan Cheng <evan.cheng@apple.com>2008-02-08 00:12:56 +0000
committerEvan Cheng <evan.cheng@apple.com>2008-02-08 00:12:56 +0000
commit33663fc104d0cdfc06cac55f677e9bc0bb5f5817 (patch)
tree19bed340b6fbe84c80b7694d1b97af45c35021ce
parent5252ae6ecad11b578e9bc61806670494efd439c8 (diff)
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Added missing entries in X86 load / store folding tables.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46866 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86InstrInfo.cpp8
-rw-r--r--test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll20
2 files changed, 28 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 18c5d2f..0c9a5c6 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -495,6 +495,14 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
{ X86::DIVPSrr, X86::DIVPSrm },
{ X86::DIVSDrr, X86::DIVSDrm },
{ X86::DIVSSrr, X86::DIVSSrm },
+ { X86::FsANDNPDrr, X86::FsANDNPDrm },
+ { X86::FsANDNPSrr, X86::FsANDNPSrm },
+ { X86::FsANDPDrr, X86::FsANDPDrm },
+ { X86::FsANDPSrr, X86::FsANDPSrm },
+ { X86::FsORPDrr, X86::FsORPDrm },
+ { X86::FsORPSrr, X86::FsORPSrm },
+ { X86::FsXORPDrr, X86::FsXORPDrm },
+ { X86::FsXORPSrr, X86::FsXORPSrm },
{ X86::HADDPDrr, X86::HADDPDrm },
{ X86::HADDPSrr, X86::HADDPSrm },
{ X86::HSUBPDrr, X86::HSUBPDrm },
diff --git a/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll b/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll
new file mode 100644
index 0000000..f1300fa
--- /dev/null
+++ b/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll
@@ -0,0 +1,20 @@
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep xor | grep CPI
+
+define void @casin({ double, double }* sret %agg.result, double %z.0, double %z.1) nounwind {
+entry:
+ %memtmp = alloca { double, double }, align 8 ; <{ double, double }*> [#uses=3]
+ %tmp4 = sub double -0.000000e+00, %z.1 ; <double> [#uses=1]
+ call void @casinh( { double, double }* sret %memtmp, double %tmp4, double %z.0 ) nounwind
+ %tmp19 = getelementptr { double, double }* %memtmp, i32 0, i32 0 ; <double*> [#uses=1]
+ %tmp20 = load double* %tmp19, align 8 ; <double> [#uses=1]
+ %tmp22 = getelementptr { double, double }* %memtmp, i32 0, i32 1 ; <double*> [#uses=1]
+ %tmp23 = load double* %tmp22, align 8 ; <double> [#uses=1]
+ %tmp32 = sub double -0.000000e+00, %tmp20 ; <double> [#uses=1]
+ %tmp37 = getelementptr { double, double }* %agg.result, i32 0, i32 0 ; <double*> [#uses=1]
+ store double %tmp23, double* %tmp37, align 8
+ %tmp40 = getelementptr { double, double }* %agg.result, i32 0, i32 1 ; <double*> [#uses=1]
+ store double %tmp32, double* %tmp40, align 8
+ ret void
+}
+
+declare void @casinh({ double, double }* sret , double, double) nounwind