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author | Jim Grosbach <grosbach@apple.com> | 2009-10-06 15:03:44 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2009-10-06 15:03:44 +0000 |
commit | 33b6450f08ca9ef6306adbd8cdb24145bf9a2202 (patch) | |
tree | d9aaa2fcf41e6ebe9a274e2982f9f78c96245203 | |
parent | f434889fb46c722f22c99a827ccc026f6271e3cd (diff) | |
download | external_llvm-33b6450f08ca9ef6306adbd8cdb24145bf9a2202.zip external_llvm-33b6450f08ca9ef6306adbd8cdb24145bf9a2202.tar.gz external_llvm-33b6450f08ca9ef6306adbd8cdb24145bf9a2202.tar.bz2 |
grammar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83378 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/CodeGen/RegisterScavenging.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp index 9e56039..8c79232 100644 --- a/lib/CodeGen/RegisterScavenging.cpp +++ b/lib/CodeGen/RegisterScavenging.cpp @@ -303,7 +303,7 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC, if (!TRI->saveScavengerRegister(*MBB, I, RC, SReg)) { // Spill the scavenged register before I. assert(ScavengingFrameIndex >= 0 && - "Cannot scavenging register without an emergency spill slot!"); + "Cannot scavenge register without an emergency spill slot!"); TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, RC); MachineBasicBlock::iterator II = prior(I); TRI->eliminateFrameIndex(II, SPAdj, this); |