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| author | Jim Grosbach <grosbach@apple.com> | 2010-11-03 22:03:20 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-11-03 22:03:20 +0000 |
| commit | 35b2de012d9404e3e9e4373e45f41711f752dd3a (patch) | |
| tree | ff3ba78a82d4a7c520e0fb1651a30df2815ebf0f | |
| parent | d81f17acb4f2d755759a4d8a83a71a98ade0edd3 (diff) | |
| download | external_llvm-35b2de012d9404e3e9e4373e45f41711f752dd3a.zip external_llvm-35b2de012d9404e3e9e4373e45f41711f752dd3a.tar.gz external_llvm-35b2de012d9404e3e9e4373e45f41711f752dd3a.tar.bz2 | |
trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118199 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMMCCodeEmitter.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMMCCodeEmitter.cpp b/lib/Target/ARM/ARMMCCodeEmitter.cpp index 62ec8bf..a1925b7 100644 --- a/lib/Target/ARM/ARMMCCodeEmitter.cpp +++ b/lib/Target/ARM/ARMMCCodeEmitter.cpp @@ -255,7 +255,7 @@ unsigned ARMMCCodeEmitter::getSORegOpValue(const MCInst &MI, // Sub-operands are [reg, reg, imm]. The first register is Rm, the reg to be // shifted. The second is either Rs, the amount to shift by, or reg0 in which // case the imm contains the amount to shift by. - // + // // {3-0} = Rm. // {4} = 1 if reg shift, 0 if imm shift // {6-5} = type @@ -349,7 +349,7 @@ unsigned ARMMCCodeEmitter::getAddrMode6AddressOpValue(const MCInst &MI, unsigned Op) const { const MCOperand &Reg = MI.getOperand(Op); const MCOperand &Imm = MI.getOperand(Op + 1); - + unsigned RegNo = getARMRegisterNumbering(Reg.getReg()); unsigned Align = 0; |