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| author | Evan Cheng <evan.cheng@apple.com> | 2008-05-22 18:56:56 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-05-22 18:56:56 +0000 |
| commit | 3ad16c4e2eb36a50bf93254ca33f739cfe6e9346 (patch) | |
| tree | a2088e5960c80c59405844127aafae10afdd5d1a | |
| parent | 328cbbb7c7df553c1612b73dcf3c8a4ae5582619 (diff) | |
| download | external_llvm-3ad16c4e2eb36a50bf93254ca33f739cfe6e9346.zip external_llvm-3ad16c4e2eb36a50bf93254ca33f739cfe6e9346.tar.gz external_llvm-3ad16c4e2eb36a50bf93254ca33f739cfe6e9346.tar.bz2 | |
Add missing patterns.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51435 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 10 | ||||
| -rw-r--r-- | test/CodeGen/X86/vec_set-I.ll | 10 |
2 files changed, 20 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 6bf2024..c7ddfdc 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -2351,6 +2351,12 @@ def MOVZDI2PDIrm : PDI<0x6E, MRMSrcMem, (outs VR128:$dst), (ins i32mem:$src), [(set VR128:$dst, (v4i32 (X86vzmovl (v4i32 (scalar_to_vector (loadi32 addr:$src))))))]>; + +def : Pat<(v4i32 (X86vzmovl (loadv4i32 addr:$src))), + (MOVZDI2PDIrm addr:$src)>; +def : Pat<(v4i32 (X86vzmovl (bc_v4i32 (loadv4f32 addr:$src)))), + (MOVZDI2PDIrm addr:$src)>; + def MOVZQI2PQIrm : I<0x7E, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src), "movq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, @@ -2358,6 +2364,10 @@ def MOVZQI2PQIrm : I<0x7E, MRMSrcMem, (outs VR128:$dst), (ins i64mem:$src), (loadi64 addr:$src))))))]>, XS, Requires<[HasSSE2]>; +def : Pat<(v2i64 (X86vzmovl (loadv2i64 addr:$src))), + (MOVZQI2PQIrm addr:$src)>; +def : Pat<(v2i64 (X86vzmovl (bc_v2i64 (loadv4f32 addr:$src)))), + (MOVZQI2PQIrm addr:$src)>; def : Pat<(v2i64 (X86vzload addr:$src)), (MOVZQI2PQIrm addr:$src)>; } diff --git a/test/CodeGen/X86/vec_set-I.ll b/test/CodeGen/X86/vec_set-I.ll new file mode 100644 index 0000000..e1c44d0 --- /dev/null +++ b/test/CodeGen/X86/vec_set-I.ll @@ -0,0 +1,10 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movd +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep xorp + +define void @t1() nounwind { + %tmp298.i.i = load <4 x float>* null, align 16 + %tmp304.i.i = bitcast <4 x float> %tmp298.i.i to <4 x i32> + %tmp305.i.i = and <4 x i32> %tmp304.i.i, < i32 -1, i32 0, i32 0, i32 0 > + store <4 x i32> %tmp305.i.i, <4 x i32>* null, align 16 + unreachable +} |