Update LLVM for merge to r171905.

Android.mk
lib/Analysis/Android.mk
lib/CodeGen/Android.mk
lib/CodeGen/MachineScheduler.cpp - specify std::pop_heap()
lib/IR/Android.mk - new from lib/VMCore
lib/MC/Android.mk
lib/MC/MCAssembler.cpp - put back pointer param (from reference).
lib/Support/DeltaAlgorithm.cpp - iterator -> const_iterator !
lib/TableGen/Android.mk
lib/Target/ARM/ARMJITInfo.cpp - Removed unused legacy JIT changes
lib/Target/ARM/Android.mk
lib/Target/ARM/AsmParser/Android.mk
lib/Target/ARM/Disassembler/Android.mk
lib/Target/ARM/MCTargetDesc/Android.mk
lib/Target/Android.mk
lib/Target/Mips/Android.mk
lib/Target/Mips/Disassembler/Android.mk
lib/Target/Mips/MCTargetDesc/Android.mk
lib/Target/X86/Android.mk
lib/Target/X86/AsmParser/Android.mk
lib/Target/X86/Disassembler/Android.mk
lib/Transforms/IPO/Android.mk
lib/Transforms/Instrumentation/Android.mk
lib/Transforms/Scalar/Android.mk
lib/Transforms/Utils/Android.mk
lib/Transforms/Vectorize/Android.mk
lib/VMCore/Android.mk - moved to lib/IR
llvm-gen-intrinsics.mk - new Intrinsics.td location
utils/TableGen/Android.mk

Change-Id: Ifebdb1716c372fd917a844c44be9d10df66434b0

28 files changed, 32 insertions, 52 deletions

diff --git a/Android.mk b/Android.mk
index da30740..f50ecd4 100644
--- a/Android.mk
+++ b/Android.mk
@@ -16,6 +16,7 @@ subdirs := \
   lib/CodeGen \
   lib/CodeGen/AsmPrinter \
   lib/CodeGen/SelectionDAG \
+  lib/IR \
   lib/Linker \
   lib/MC \
   lib/MC/MCParser \
@@ -29,7 +30,6 @@ subdirs := \
   lib/Transforms/Scalar \
   lib/Transforms/Utils \
   lib/Transforms/Vectorize \
-  lib/VMCore \
   utils/FileCheck \
   utils/TableGen
 
diff --git a/lib/Analysis/Android.mk b/lib/Analysis/Android.mk
index 2ebf091..c2ff493 100644
--- a/lib/Analysis/Android.mk
+++ b/lib/Analysis/Android.mk
@@ -14,7 +14,9 @@ analysis_SRC_FILES := \
   CaptureTracking.cpp \
   CodeMetrics.cpp \
   ConstantFolding.cpp \
+  CostModel.cpp \
   DbgInfoPrinter.cpp \
+  DependenceAnalysis.cpp \
   DomPrinter.cpp \
   DominanceFrontier.cpp \
   IVUsers.cpp \
@@ -28,7 +30,6 @@ analysis_SRC_FILES := \
   LibCallSemantics.cpp \
   Lint.cpp \
   Loads.cpp \
-  LoopDependenceAnalysis.cpp \
   LoopInfo.cpp \
   LoopPass.cpp \
   MemDepPrinter.cpp \
@@ -48,6 +49,7 @@ analysis_SRC_FILES := \
   ProfileInfoLoader.cpp \
   ProfileInfoLoaderPass.cpp \
   ProfileVerifierPass.cpp \
+  PtrUseVisitor.cpp \
   RegionInfo.cpp \
   RegionPass.cpp \
   RegionPrinter.cpp \
@@ -56,6 +58,7 @@ analysis_SRC_FILES := \
   ScalarEvolutionExpander.cpp \
   ScalarEvolutionNormalization.cpp \
   SparsePropagation.cpp \
+  TargetTransformInfo.cpp \
   Trace.cpp \
   TypeBasedAliasAnalysis.cpp \
   ValueTracking.cpp
diff --git a/lib/CodeGen/Android.mk b/lib/CodeGen/Android.mk
index 57c4a9b..03a0f7d 100644
--- a/lib/CodeGen/Android.mk
+++ b/lib/CodeGen/Android.mk
@@ -4,6 +4,7 @@ codegen_SRC_FILES := \
   AggressiveAntiDepBreaker.cpp \
   AllocationOrder.cpp \
   Analysis.cpp \
+  BasicTargetTransformInfo.cpp \
   BranchFolding.cpp \
   CalcSpillWeights.cpp \
   CallingConvLower.cpp \
@@ -53,10 +54,10 @@ codegen_SRC_FILES := \
   MachineInstrBundle.cpp \
   MachineLICM.cpp \
   MachineLoopInfo.cpp \
-  MachineLoopRanges.cpp \
   MachineModuleInfo.cpp \
   MachineModuleInfoImpls.cpp \
   MachinePassRegistry.cpp \
+  MachinePostDominators.cpp \
   MachineRegisterInfo.cpp \
   MachineSSAUpdater.cpp \
   MachineScheduler.cpp \
@@ -99,9 +100,11 @@ codegen_SRC_FILES := \
   StrongPHIElimination.cpp \
   TailDuplication.cpp \
   TargetFrameLoweringImpl.cpp \
-  TargetInstrInfoImpl.cpp \
+  TargetInstrInfo.cpp \
   TargetLoweringObjectFileImpl.cpp \
   TargetOptionsImpl.cpp \
+  TargetRegisterInfo.cpp \
+  TargetSchedule.cpp \
   TwoAddressInstructionPass.cpp \
   UnreachableBlockElim.cpp \
   VirtRegMap.cpp
diff --git a/lib/CodeGen/MachineScheduler.cpp b/lib/CodeGen/MachineScheduler.cpp
index 117b2bd..54a7851 100644
--- a/lib/CodeGen/MachineScheduler.cpp
+++ b/lib/CodeGen/MachineScheduler.cpp
@@ -2133,7 +2133,7 @@ public:
   /// Callback to select the highest priority node from the ready Q.
   virtual SUnit *pickNode(bool &IsTopNode) {
     if (ReadyQ.empty()) return NULL;
-    pop_heap(ReadyQ.begin(), ReadyQ.end(), Cmp);
+    std::pop_heap(ReadyQ.begin(), ReadyQ.end(), Cmp);
     SUnit *SU = ReadyQ.back();
     ReadyQ.pop_back();
     IsTopNode = false;
diff --git a/lib/VMCore/Android.mk b/lib/IR/Android.mk
index cc18f48..6df36f8 100644
--- a/lib/VMCore/Android.mk
+++ b/lib/IR/Android.mk
@@ -8,6 +8,7 @@ vmcore_SRC_FILES := \
   ConstantFold.cpp \
   Constants.cpp \
   Core.cpp \
+  DataLayout.cpp \
   DebugInfo.cpp \
   DebugLoc.cpp \
   DIBuilder.cpp \
diff --git a/lib/MC/Android.mk b/lib/MC/Android.mk
index e2a22ad..a0b77ba 100644
--- a/lib/MC/Android.mk
+++ b/lib/MC/Android.mk
@@ -36,7 +36,6 @@ mc_SRC_FILES := \
   MCStreamer.cpp \
   MCSubtargetInfo.cpp \
   MCSymbol.cpp \
-  MCTargetAsmLexer.cpp \
   MCValue.cpp \
   MCWin64EH.cpp \
   WinCOFFObjectWriter.cpp \
diff --git a/lib/MC/MCAssembler.cpp b/lib/MC/MCAssembler.cpp
index abf095e..46a0089 100644
--- a/lib/MC/MCAssembler.cpp
+++ b/lib/MC/MCAssembler.cpp
@@ -256,7 +256,7 @@ MCSymbolData::MCSymbolData(const MCSymbol &_Symbol, MCFragment *_Fragment,
 MCAssembler::MCAssembler(MCContext &Context_, MCAsmBackend &Backend_,
                          MCCodeEmitter &Emitter_, MCObjectWriter &Writer_,
                          raw_ostream &OS_)
-  : Context(Context_), Backend(Backend_), Emitter(Emitter_), Writer(Writer_),
+  : Context(Context_), Backend(Backend_), Emitter(Emitter_), Writer(&Writer_),
     OS(OS_), BundleAlignSize(0), RelaxAll(false), NoExecStack(false),
     SubsectionsViaSymbols(false) {
 }
diff --git a/lib/Support/DeltaAlgorithm.cpp b/lib/Support/DeltaAlgorithm.cpp
index a1e3311..f290668 100644
--- a/lib/Support/DeltaAlgorithm.cpp
+++ b/lib/Support/DeltaAlgorithm.cpp
@@ -29,7 +29,7 @@ void DeltaAlgorithm::Split(const changeset_ty &S, changesetlist_ty &Res) {
   // FIXME: Allow clients to provide heuristics for improved splitting.
   // Get the iterator to the middle.
   unsigned N = S.size() / 2;
-  changeset_ty::iterator middle(S.begin());
+  changeset_ty::const_iterator middle(S.begin());
   std::advance(middle, N);
 
   // Create each vector using the middle as the split.
diff --git a/lib/TableGen/Android.mk b/lib/TableGen/Android.mk
index 0e79db5..2169f33 100644
--- a/lib/TableGen/Android.mk
+++ b/lib/TableGen/Android.mk
@@ -5,7 +5,6 @@ libtablegen_SRC_FILES := \
   Main.cpp \
   Record.cpp \
   StringMatcher.cpp \
-  TableGenAction.cpp \
   TableGenBackend.cpp \
   TGLexer.cpp \
   TGParser.cpp
diff --git a/lib/Target/ARM/ARMJITInfo.cpp b/lib/Target/ARM/ARMJITInfo.cpp
index a5642d6..351a290 100644
--- a/lib/Target/ARM/ARMJITInfo.cpp
+++ b/lib/Target/ARM/ARMJITInfo.cpp
@@ -48,7 +48,7 @@ static TargetJITInfo::JITCompilerFn JITCompilerFunction;
 // write our own wrapper, which does things our way, so we have complete
 // control over register saving and restoring.
 extern "C" {
-#if defined(__arm__) && !defined(ANDROID)
+#if defined(__arm__)
   void ARMCompilationCallback();
   asm(
     ".text\n"
@@ -248,7 +248,6 @@ intptr_t ARMJITInfo::resolveRelocDestAddr(MachineRelocation *MR) const {
     return getJumpTableBaseAddr(MR->getJumpTableIndex());
   case ARM::reloc_arm_cp_entry:
   case ARM::reloc_arm_vfp_cp_entry:
-  case ARM::reloc_arm_so_imm_cp_entry:
     // Constant pool entry address.
     return getConstantPoolEntryAddr(MR->getConstantPoolIndex());
   case ARM::reloc_arm_machine_cp_entry: {
@@ -295,29 +294,6 @@ void ARMJITInfo::relocate(void *Function, MachineRelocation *MR,
       *((intptr_t*)RelocPos) |= 15 << ARMII::RegRnShift;
       break;
     }
-    case ARM::reloc_arm_so_imm_cp_entry: {
-      ResultPtr = ResultPtr - (intptr_t)RelocPos - 8;
-      // If the result is positive, set bit U(23) to 1.
-      if (ResultPtr >= 0)
-        *((intptr_t*)RelocPos) |= 1 << ARMII::U_BitShift;
-      else {
-        // Otherwise, obtain the absolute value and set bit U(23) to 0.
-        *((intptr_t*)RelocPos) &= ~(1 << ARMII::U_BitShift);
-        // FIXME: Also set bit 22 to 1 since 'sub' instruction is going to be used.
-        *((intptr_t*)RelocPos) |= 1 << 22;
-        ResultPtr = - ResultPtr;
-      }
-
-      int SoImmVal = ARM_AM::getSOImmVal(ResultPtr);
-      assert(SoImmVal != -1 && "Not a valid so_imm value!");
-      *((intptr_t*)RelocPos) |= (ARM_AM::getSOImmValRot((unsigned)SoImmVal) >> 1)
-            << ARMII::SoRotImmShift;
-      *((intptr_t*)RelocPos) |= ARM_AM::getSOImmValImm((unsigned)SoImmVal);
-       // Set register Rn to PC (which is register 15 on all architectures).
-       // FIXME: This avoids the need for register info in the JIT class.
-       *((intptr_t*)RelocPos) |= 15 << ARMII::RegRnShift;
-      break;
-    }
     case ARM::reloc_arm_pic_jt:
     case ARM::reloc_arm_machine_cp_entry:
     case ARM::reloc_arm_absolute: {
diff --git a/lib/Target/ARM/Android.mk b/lib/Target/ARM/Android.mk
index bf58f11..6a25ae1 100644
--- a/lib/Target/ARM/Android.mk
+++ b/lib/Target/ARM/Android.mk
@@ -12,7 +12,6 @@ arm_codegen_TBLGEN_TABLES := \
   ARMGenFastISel.inc \
   ARMGenCallingConv.inc \
   ARMGenSubtargetInfo.inc \
-  ARMGenEDInfo.inc \
   ARMGenDisassemblerTables.inc
 
 arm_codegen_SRC_FILES := \
@@ -22,7 +21,6 @@ arm_codegen_SRC_FILES := \
   ARMCodeEmitter.cpp \
   ARMConstantIslandPass.cpp \
   ARMConstantPoolValue.cpp \
-  ARMELFWriterInfo.cpp \
   ARMExpandPseudoInsts.cpp \
   ARMFastISel.cpp \
   ARMFrameLowering.cpp \
@@ -39,6 +37,7 @@ arm_codegen_SRC_FILES := \
   ARMSubtarget.cpp \
   ARMTargetMachine.cpp \
   ARMTargetObjectFile.cpp \
+  ARMTargetTransformInfo.cpp \
   InstPrinter/ARMInstPrinter.cpp \
   MLxExpansionPass.cpp \
   Thumb1FrameLowering.cpp \
diff --git a/lib/Target/ARM/AsmParser/Android.mk b/lib/Target/ARM/AsmParser/Android.mk
index 5e64e27..e17a274 100644
--- a/lib/Target/ARM/AsmParser/Android.mk
+++ b/lib/Target/ARM/AsmParser/Android.mk
@@ -5,7 +5,6 @@ LOCAL_PATH := $(call my-dir)
 #===---------------------------------------------------------------===
 
 arm_asm_parser_SRC_FILES := \
-  ARMAsmLexer.cpp \
   ARMAsmParser.cpp
 
 arm_asm_parser_TBLGEN_TABLES := \
diff --git a/lib/Target/ARM/Disassembler/Android.mk b/lib/Target/ARM/Disassembler/Android.mk
index fb14762..51e364b 100644
--- a/lib/Target/ARM/Disassembler/Android.mk
+++ b/lib/Target/ARM/Disassembler/Android.mk
@@ -2,7 +2,6 @@ LOCAL_PATH := $(call my-dir)
 
 arm_disassembler_TBLGEN_TABLES := \
   ARMGenDisassemblerTables.inc \
-  ARMGenEDInfo.inc \
   ARMGenInstrInfo.inc \
   ARMGenSubtargetInfo.inc \
   ARMGenRegisterInfo.inc
diff --git a/lib/Target/ARM/MCTargetDesc/Android.mk b/lib/Target/ARM/MCTargetDesc/Android.mk
index 48a1db0..b283ec5 100644
--- a/lib/Target/ARM/MCTargetDesc/Android.mk
+++ b/lib/Target/ARM/MCTargetDesc/Android.mk
@@ -9,6 +9,7 @@ arm_mc_desc_TBLGEN_TABLES := \
 arm_mc_desc_SRC_FILES := \
   ARMAsmBackend.cpp \
   ARMELFObjectWriter.cpp \
+  ARMELFStreamer.cpp \
   ARMMCAsmInfo.cpp \
   ARMMCCodeEmitter.cpp \
   ARMMCExpr.cpp \
diff --git a/lib/Target/Android.mk b/lib/Target/Android.mk
index f27aa2e..60f5b18 100644
--- a/lib/Target/Android.mk
+++ b/lib/Target/Android.mk
@@ -3,15 +3,12 @@ LOCAL_PATH:= $(call my-dir)
 target_SRC_FILES := \
   Mangler.cpp \
   Target.cpp \
-  TargetData.cpp \
-  TargetELFWriterInfo.cpp \
-  TargetInstrInfo.cpp \
   TargetIntrinsicInfo.cpp \
   TargetJITInfo.cpp \
   TargetLibraryInfo.cpp \
   TargetLoweringObjectFile.cpp \
+  TargetMachineC.cpp \
   TargetMachine.cpp \
-  TargetRegisterInfo.cpp \
   TargetSubtargetInfo.cpp
 
 # For the host
diff --git a/lib/Target/Mips/Android.mk b/lib/Target/Mips/Android.mk
index af24a5a..44271e9 100644
--- a/lib/Target/Mips/Android.mk
+++ b/lib/Target/Mips/Android.mk
@@ -5,6 +5,7 @@ mips_codegen_TBLGEN_TABLES := \
   MipsGenInstrInfo.inc \
   MipsGenCodeEmitter.inc \
   MipsGenMCCodeEmitter.inc \
+  MipsGenMCPseudoLowering.inc \
   MipsGenAsmWriter.inc \
   MipsGenDAGISel.inc \
   MipsGenCallingConv.inc \
@@ -18,8 +19,6 @@ mips_codegen_SRC_FILES := \
   MipsAsmPrinter.cpp \
   MipsCodeEmitter.cpp \
   MipsDelaySlotFiller.cpp \
-  MipsDirectObjLower.cpp \
-  MipsELFWriterInfo.cpp \
   MipsFrameLowering.cpp \
   MipsInstrInfo.cpp \
   MipsISelDAGToDAG.cpp \
diff --git a/lib/Target/Mips/Disassembler/Android.mk b/lib/Target/Mips/Disassembler/Android.mk
index 6c28c69..4e38c4b 100644
--- a/lib/Target/Mips/Disassembler/Android.mk
+++ b/lib/Target/Mips/Disassembler/Android.mk
@@ -2,7 +2,6 @@ LOCAL_PATH := $(call my-dir)
 
 mips_disassembler_TBLGEN_TABLES := \
   MipsGenDisassemblerTables.inc \
-  MipsGenEDInfo.inc \
   MipsGenInstrInfo.inc \
   MipsGenRegisterInfo.inc \
   MipsGenSubtargetInfo.inc
diff --git a/lib/Target/Mips/MCTargetDesc/Android.mk b/lib/Target/Mips/MCTargetDesc/Android.mk
index fac9d33..83fe61e 100644
--- a/lib/Target/Mips/MCTargetDesc/Android.mk
+++ b/lib/Target/Mips/MCTargetDesc/Android.mk
@@ -8,6 +8,7 @@ mips_mc_desc_TBLGEN_TABLES := \
 
 mips_mc_desc_SRC_FILES := \
   MipsAsmBackend.cpp \
+  MipsDirectObjLower.cpp \
   MipsELFObjectWriter.cpp \
   MipsMCAsmInfo.cpp \
   MipsMCCodeEmitter.cpp \
diff --git a/lib/Target/X86/Android.mk b/lib/Target/X86/Android.mk
index 445dd5d..f159bb2 100644
--- a/lib/Target/X86/Android.mk
+++ b/lib/Target/X86/Android.mk
@@ -14,7 +14,6 @@ x86_codegen_SRC_FILES := \
   X86AsmPrinter.cpp \
   X86COFFMachineModuleInfo.cpp \
   X86CodeEmitter.cpp \
-  X86ELFWriterInfo.cpp \
   X86FastISel.cpp \
   X86FloatingPoint.cpp \
   X86FrameLowering.cpp \
@@ -24,11 +23,13 @@ x86_codegen_SRC_FILES := \
   X86JITInfo.cpp \
   X86MachineFunctionInfo.cpp \
   X86MCInstLower.cpp \
+  X86PadShortFunction.cpp \
   X86RegisterInfo.cpp \
   X86SelectionDAGInfo.cpp \
   X86Subtarget.cpp \
   X86TargetMachine.cpp \
   X86TargetObjectFile.cpp \
+  X86TargetTransformInfo.cpp \
   X86VZeroUpper.cpp
 
 # For the host
diff --git a/lib/Target/X86/AsmParser/Android.mk b/lib/Target/X86/AsmParser/Android.mk
index 148d074..d6de437 100644
--- a/lib/Target/X86/AsmParser/Android.mk
+++ b/lib/Target/X86/AsmParser/Android.mk
@@ -6,7 +6,6 @@ include $(CLEAR_VARS)
 include $(CLEAR_TBLGEN_VARS)
 
 x86_asm_parser_SRC_FILES :=	\
-	X86AsmLexer.cpp	\
 	X86AsmParser.cpp
 
 x86_asm_parser_TBLGEN_TABLES :=	\
diff --git a/lib/Target/X86/Disassembler/Android.mk b/lib/Target/X86/Disassembler/Android.mk
index e631db6..1cee663 100644
--- a/lib/Target/X86/Disassembler/Android.mk
+++ b/lib/Target/X86/Disassembler/Android.mk
@@ -2,7 +2,6 @@ LOCAL_PATH := $(call my-dir)
 
 x86_disassembler_TBLGEN_TABLES := \
   X86GenDisassemblerTables.inc \
-  X86GenEDInfo.inc \
   X86GenInstrInfo.inc \
   X86GenRegisterInfo.inc
 
diff --git a/lib/Transforms/IPO/Android.mk b/lib/Transforms/IPO/Android.mk
index ba9f2b5..dcf48df 100644
--- a/lib/Transforms/IPO/Android.mk
+++ b/lib/Transforms/IPO/Android.mk
@@ -2,6 +2,7 @@ LOCAL_PATH:= $(call my-dir)
 
 transforms_ipo_SRC_FILES := \
   ArgumentPromotion.cpp \
+  BarrierNoopPass.cpp \
   ConstantMerge.cpp \
   DeadArgumentElimination.cpp \
   ExtractGV.cpp \
diff --git a/lib/Transforms/Instrumentation/Android.mk b/lib/Transforms/Instrumentation/Android.mk
index a6512bf..9736619 100644
--- a/lib/Transforms/Instrumentation/Android.mk
+++ b/lib/Transforms/Instrumentation/Android.mk
@@ -7,6 +7,7 @@ instrumentation_SRC_FILES := \
   EdgeProfiling.cpp \
   GCOVProfiling.cpp \
   Instrumentation.cpp \
+  MemorySanitizer.cpp \
   OptimalEdgeProfiling.cpp \
   PathProfiling.cpp \
   ProfilingUtils.cpp \
diff --git a/lib/Transforms/Scalar/Android.mk b/lib/Transforms/Scalar/Android.mk
index 8804508..a542d9b 100644
--- a/lib/Transforms/Scalar/Android.mk
+++ b/lib/Transforms/Scalar/Android.mk
@@ -27,6 +27,7 @@ transforms_scalar_SRC_FILES := \
   Reassociate.cpp \
   Reg2Mem.cpp \
   SCCP.cpp \
+  SROA.cpp \
   Scalar.cpp \
   ScalarReplAggregates.cpp \
   SimplifyCFGPass.cpp \
diff --git a/lib/Transforms/Utils/Android.mk b/lib/Transforms/Utils/Android.mk
index c3f0789..df87208 100644
--- a/lib/Transforms/Utils/Android.mk
+++ b/lib/Transforms/Utils/Android.mk
@@ -1,7 +1,6 @@
 LOCAL_PATH:= $(call my-dir)
 
 transforms_utils_SRC_FILES := \
-  AddrModeMatcher.cpp \
   BasicBlockUtils.cpp \
   BreakCriticalEdges.cpp \
   BuildLibCalls.cpp \
@@ -22,12 +21,14 @@ transforms_utils_SRC_FILES := \
   LowerInvoke.cpp \
   LowerSwitch.cpp \
   Mem2Reg.cpp \
+  MetaRenamer.cpp \
   ModuleUtils.cpp \
   PromoteMemoryToRegister.cpp \
   SSAUpdater.cpp \
   SimplifyCFG.cpp \
   SimplifyIndVar.cpp \
   SimplifyInstructions.cpp \
+  SimplifyLibCalls.cpp \
   UnifyFunctionExitNodes.cpp \
   Utils.cpp \
   ValueMapper.cpp
diff --git a/lib/Transforms/Vectorize/Android.mk b/lib/Transforms/Vectorize/Android.mk
index 0e9f337..de03793 100644
--- a/lib/Transforms/Vectorize/Android.mk
+++ b/lib/Transforms/Vectorize/Android.mk
@@ -2,6 +2,7 @@ LOCAL_PATH:= $(call my-dir)
 
 transforms_vectorize_SRC_FILES := \
   BBVectorize.cpp \
+  LoopVectorize.cpp \
   Vectorize.cpp
 
 # For the host
diff --git a/llvm-gen-intrinsics.mk b/llvm-gen-intrinsics.mk
index 2c96655..3a97717 100644
--- a/llvm-gen-intrinsics.mk
+++ b/llvm-gen-intrinsics.mk
@@ -1,5 +1,5 @@
 # We treat Intrinsics.td as a very special target just like what lib/VMCore/Makefile does
-INTRINSICTD := $(LLVM_ROOT_PATH)/include/llvm/Intrinsics.td
+INTRINSICTD := $(LLVM_ROOT_PATH)/include/llvm/IR/Intrinsics.td
 INTRINSICTDS := $(wildcard $(dir $(INTRINSICTD))/Intrinsics*.td)
 
 LOCAL_SRC_FILES := $(INTRINSICTD) $(LOCAL_SRC_FILES)
@@ -8,7 +8,7 @@ ifeq ($(LOCAL_MODULE_CLASS),)
 	LOCAL_MODULE_CLASS := STATIC_LIBRARIES
 endif
 
-GENFILE := $(addprefix $(call local-intermediates-dir)/llvm/,Intrinsics.gen)
+GENFILE := $(addprefix $(call local-intermediates-dir)/llvm/IR/,Intrinsics.gen)
 LOCAL_GENERATED_SOURCES += $(GENFILE)
 $(GENFILE): TBLGEN_LOCAL_MODULE := $(LOCAL_MODULE)
 $(GENFILE): $(INTRINSICTD) $(INTRINSICTDS) $(TBLGEN)
diff --git a/utils/TableGen/Android.mk b/utils/TableGen/Android.mk
index 92a2ce03e..e15f37b 100644
--- a/utils/TableGen/Android.mk
+++ b/utils/TableGen/Android.mk
@@ -8,6 +8,7 @@ tablegen_SRC_FILES := \
   CodeEmitterGen.cpp \
   CodeGenDAGPatterns.cpp \
   CodeGenInstruction.cpp \
+  CodeGenMapTable.cpp \
   CodeGenRegisters.cpp \
   CodeGenSchedule.cpp \
   CodeGenTarget.cpp \
@@ -18,11 +19,11 @@ tablegen_SRC_FILES := \
   DAGISelMatcher.cpp \
   DFAPacketizerEmitter.cpp \
   DisassemblerEmitter.cpp \
-  EDEmitter.cpp \
   FastISelEmitter.cpp \
   FixedLenDecoderEmitter.cpp \
   InstrInfoEmitter.cpp \
   IntrinsicEmitter.cpp \
+  OptParserEmitter.cpp \
   PseudoLoweringEmitter.cpp \
   RegisterInfoEmitter.cpp \
   SetTheory.cpp \