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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-18 00:53:27 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-18 00:53:27 +0000 |
commit | 3b6434e360315849a65b1ac85e16d160131a77a4 (patch) | |
tree | 9510c073b6d32f0f2620a6242c9cc9c9a0fba6c5 | |
parent | b4c704877d1600852a55ab7bef2918a7c0af5e0d (diff) | |
download | external_llvm-3b6434e360315849a65b1ac85e16d160131a77a4.zip external_llvm-3b6434e360315849a65b1ac85e16d160131a77a4.tar.gz external_llvm-3b6434e360315849a65b1ac85e16d160131a77a4.tar.bz2 |
Reserve D16-D13 on subtargets that don't support them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133321 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/ARMBaseRegisterInfo.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/lib/Target/ARM/ARMBaseRegisterInfo.cpp index 2adcd2c..9dc51b8 100644 --- a/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -100,6 +100,12 @@ getReservedRegs(const MachineFunction &MF) const { // Some targets reserve R9. if (STI.isR9Reserved()) Reserved.set(ARM::R9); + // Reserve D16-D31 if the subtarget doesn't support them. + if (!STI.hasVFP3() || STI.hasD16()) { + assert(ARM::D31 == ARM::D16 + 15); + for (unsigned i = 0; i != 16; ++i) + Reserved.set(ARM::D16 + i); + } return Reserved; } |