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authorEvan Cheng <evan.cheng@apple.com>2009-06-24 23:47:58 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-06-24 23:47:58 +0000
commit41799700ca318d0eea5b2911588b4ef957b8fd51 (patch)
treea34752acab62a5015938e2252a516fd0fc7a9431
parent03f2a7b881ceb3220222eac4747abf271a6ec973 (diff)
downloadexternal_llvm-41799700ca318d0eea5b2911588b4ef957b8fd51.zip
external_llvm-41799700ca318d0eea5b2911588b4ef957b8fd51.tar.gz
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Add Thumb2 pc relative add.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74141 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMInstrThumb.td2
-rw-r--r--lib/Target/ARM/ARMInstrThumb2.td33
-rw-r--r--test/CodeGen/Thumb2/load-global.ll9
-rw-r--r--test/CodeGen/Thumb2/pic-jtbl.ll55
4 files changed, 98 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td
index db52a3b..fd9ee2e 100644
--- a/lib/Target/ARM/ARMInstrThumb.td
+++ b/lib/Target/ARM/ARMInstrThumb.td
@@ -128,7 +128,7 @@ PseudoInst<(outs), (ins i32imm:$amt),
}
let isNotDuplicable = 1 in
-def tPICADD : TIt<(outs tGPR:$dst), (ins tGPR:$lhs, pclabel:$cp),
+def tPICADD : T1It<(outs tGPR:$dst), (ins tGPR:$lhs, pclabel:$cp),
"$cp:\n\tadd $dst, pc",
[(set tGPR:$dst, (ARMpic_add tGPR:$lhs, imm:$cp))]>;
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td
index 1f50886..99ebaf0 100644
--- a/lib/Target/ARM/ARMInstrThumb2.td
+++ b/lib/Target/ARM/ARMInstrThumb2.td
@@ -315,6 +315,33 @@ multiclass T2I_cmp_is<string opc, PatFrag opnode> {
}
//===----------------------------------------------------------------------===//
+// Miscellaneous Instructions.
+//
+
+let isNotDuplicable = 1 in
+def t2PICADD : T2I<(outs tGPR:$dst), (ins tGPR:$lhs, pclabel:$cp),
+ "$cp:\n\tadd $dst, pc",
+ [(set tGPR:$dst, (ARMpic_add tGPR:$lhs, imm:$cp))]>;
+
+
+// LEApcrel - Load a pc-relative address into a register without offending the
+// assembler.
+def t2LEApcrel : T2I<(outs GPR:$dst), (ins i32imm:$label, pred:$p),
+ !strconcat(!strconcat(".set PCRELV${:uid}, ($label-(",
+ "${:private}PCRELL${:uid}+8))\n"),
+ !strconcat("${:private}PCRELL${:uid}:\n\t",
+ "add$p $dst, pc, #PCRELV${:uid}")),
+ []>;
+
+def t2LEApcrelJT : T2I<(outs GPR:$dst),
+ (ins i32imm:$label, i32imm:$id, pred:$p),
+ !strconcat(!strconcat(".set PCRELV${:uid}, (${label}_${id:no_hash}-(",
+ "${:private}PCRELL${:uid}+8))\n"),
+ !strconcat("${:private}PCRELL${:uid}:\n\t",
+ "add$p $dst, pc, #PCRELV${:uid}")),
+ []>;
+
+//===----------------------------------------------------------------------===//
// Arithmetic Instructions.
//
@@ -493,6 +520,12 @@ def : Thumb2Pat<(ARMcmpNZ GPR:$src, t2_so_imm_neg:$imm),
// Non-Instruction Patterns
//
+// ConstantPool, GlobalAddress, and JumpTable
+def : Thumb2Pat<(ARMWrapper tglobaladdr :$dst), (t2LEApcrel tglobaladdr :$dst)>;
+def : Thumb2Pat<(ARMWrapper tconstpool :$dst), (t2LEApcrel tconstpool :$dst)>;
+def : Thumb2Pat<(ARMWrapperJT tjumptable:$dst, imm:$id),
+ (t2LEApcrelJT tjumptable:$dst, imm:$id)>;
+
// Large immediate handling.
def : Thumb2Pat<(i32 imm:$src),
diff --git a/test/CodeGen/Thumb2/load-global.ll b/test/CodeGen/Thumb2/load-global.ll
new file mode 100644
index 0000000..0ffcb95
--- /dev/null
+++ b/test/CodeGen/Thumb2/load-global.ll
@@ -0,0 +1,9 @@
+; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin
+; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin -relocation-model=pic | grep add | grep pc
+
+@G = external global i32
+
+define i32 @test1() {
+ %tmp = load i32* @G
+ ret i32 %tmp
+}
diff --git a/test/CodeGen/Thumb2/pic-jtbl.ll b/test/CodeGen/Thumb2/pic-jtbl.ll
new file mode 100644
index 0000000..701d308
--- /dev/null
+++ b/test/CodeGen/Thumb2/pic-jtbl.ll
@@ -0,0 +1,55 @@
+; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin -relocation-model=pic \
+; RUN: -o %t -f
+; RUN: grep add %t | grep pc
+;; NOT YET: grep "add pc"
+
+define void @bar(i32 %n.u) {
+entry:
+ switch i32 %n.u, label %bb12 [i32 1, label %bb i32 2, label %bb6 i32 4, label %bb7 i32 5, label %bb8 i32 6, label %bb10 i32 7, label %bb1 i32 8, label %bb3 i32 9, label %bb4 i32 10, label %bb9 i32 11, label %bb2 i32 12, label %bb5 i32 13, label %bb11 ]
+bb:
+ tail call void(...)* @foo1()
+ ret void
+bb1:
+ tail call void(...)* @foo2()
+ ret void
+bb2:
+ tail call void(...)* @foo6()
+ ret void
+bb3:
+ tail call void(...)* @foo3()
+ ret void
+bb4:
+ tail call void(...)* @foo4()
+ ret void
+bb5:
+ tail call void(...)* @foo5()
+ ret void
+bb6:
+ tail call void(...)* @foo1()
+ ret void
+bb7:
+ tail call void(...)* @foo2()
+ ret void
+bb8:
+ tail call void(...)* @foo6()
+ ret void
+bb9:
+ tail call void(...)* @foo3()
+ ret void
+bb10:
+ tail call void(...)* @foo4()
+ ret void
+bb11:
+ tail call void(...)* @foo5()
+ ret void
+bb12:
+ tail call void(...)* @foo6()
+ ret void
+}
+
+declare void @foo1(...)
+declare void @foo2(...)
+declare void @foo6(...)
+declare void @foo3(...)
+declare void @foo4(...)
+declare void @foo5(...)