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| author | Jack Carter <jcarter@mips.com> | 2013-01-08 19:01:28 +0000 |
|---|---|---|
| committer | Jack Carter <jcarter@mips.com> | 2013-01-08 19:01:28 +0000 |
| commit | 4a50e53e53816076584c957741cb430899271726 (patch) | |
| tree | b4fbac9175c2cd0781f3ba8a66be9acf8fb94f6d | |
| parent | 26853a5d1c39c3e4ddab3dc9f3d1f97815d974d2 (diff) | |
| download | external_llvm-4a50e53e53816076584c957741cb430899271726.zip external_llvm-4a50e53e53816076584c957741cb430899271726.tar.gz external_llvm-4a50e53e53816076584c957741cb430899271726.tar.bz2 | |
This patch produces the correct addend value for
an R_MIPS_GPREL16 relocation.
Contributer: Jack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171882 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp | 1 | ||||
| -rw-r--r-- | test/MC/Mips/mips_gprel16.ll | 33 |
2 files changed, 34 insertions, 0 deletions
diff --git a/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp b/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp index 26df966..0b13607 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp +++ b/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp @@ -37,6 +37,7 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) { case FK_Data_4: case FK_Data_8: case Mips::fixup_Mips_LO16: + case Mips::fixup_Mips_GPREL16: case Mips::fixup_Mips_GPOFF_HI: case Mips::fixup_Mips_GPOFF_LO: case Mips::fixup_Mips_GOT_PAGE: diff --git a/test/MC/Mips/mips_gprel16.ll b/test/MC/Mips/mips_gprel16.ll new file mode 100644 index 0000000..b5a282d --- /dev/null +++ b/test/MC/Mips/mips_gprel16.ll @@ -0,0 +1,33 @@ +; This addresses bug 14456. We were not writing +; out the addend to the gprel16 relocation. The +; addend is stored in the instruction immediate +; field. +;llc gprel16.ll -o gprel16.o -mcpu=mips32r2 -march=mipsel -filetype=obj -relocation-model=static + +; RUN: llc -mcpu=mips32r2 -march=mipsel -filetype=obj -relocation-model=static %s -o - \ +; RUN: | llvm-objdump -disassemble -mattr +mips32r2 - \ +; RUN: | FileCheck %s + +target triple = "mipsel-sde--elf-gcc" + +@var1 = internal global i32 0, align 4 +@var2 = internal global i32 0, align 4 + +define i32 @testvar1() nounwind { +entry: +; CHECK: lw ${{[0-9]+}}, 0($gp) + %0 = load i32* @var1, align 4 + %tobool = icmp ne i32 %0, 0 + %cond = select i1 %tobool, i32 1, i32 0 + ret i32 %cond +} + +define i32 @testvar2() nounwind { +entry: +; CHECK: lw ${{[0-9]+}}, 4($gp) + %0 = load i32* @var2, align 4 + %tobool = icmp ne i32 %0, 0 + %cond = select i1 %tobool, i32 1, i32 0 + ret i32 %cond +} + |