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authorChris Lattner <sabre@nondot.org>2006-01-12 20:22:43 +0000
committerChris Lattner <sabre@nondot.org>2006-01-12 20:22:43 +0000
commit4aafb4ff92ee6b5372aaaa51845445f2418a7fd1 (patch)
tree3564ce2e262a72451098595bcc699e6806f7c734
parent77e9043b84d465ac2a2a0af3e8295cde11cc3836 (diff)
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Add a simple missing fold to produce this:
subfic r3, r2, 33 instead of this: subfic r2, r2, 32 addi r3, r2, 1 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25255 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/SelectionDAG/DAGCombiner.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index cb80e25..9203c81 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -696,6 +696,14 @@ SDOperand DAGCombiner::visitADD(SDNode *N) {
return DAG.getNode(ISD::ADD, VT, N0.getOperand(0),
DAG.getConstant(N1C->getValue()+N01C->getValue(), VT));
}
+
+ // fold ((c1-A)+c2) -> (c1+c2)-A
+ if (N1C && N0.getOpcode() == ISD::SUB)
+ if (ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.getOperand(0)))
+ return DAG.getNode(ISD::SUB, VT,
+ DAG.getConstant(N1C->getValue()+N0C->getValue(), VT),
+ N0.getOperand(1));
+
// fold ((0-A) + B) -> B-A
if (N0.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N0.getOperand(0)) &&
cast<ConstantSDNode>(N0.getOperand(0))->isNullValue())