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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-07-30 00:57:25 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-07-30 00:57:25 +0000 |
| commit | 4af0f5fecb42563ff3ca5bd7fddb2f4f111e2fef (patch) | |
| tree | 44e100de3b58f991a1fb59c592e9f5efa487c43f | |
| parent | 2e1513d9cd7750db05048fb2af0c8cac0307fc5a (diff) | |
| download | external_llvm-4af0f5fecb42563ff3ca5bd7fddb2f4f111e2fef.zip external_llvm-4af0f5fecb42563ff3ca5bd7fddb2f4f111e2fef.tar.gz external_llvm-4af0f5fecb42563ff3ca5bd7fddb2f4f111e2fef.tar.bz2 | |
Revert "Don't check liveness of unallocatable registers."
The ARM target depends on CPSR liveness being tracked after register
allocation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136548 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/MachineVerifier.cpp | 11 | ||||
| -rw-r--r-- | lib/CodeGen/RegisterScavenging.cpp | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/vector.ll | 2 |
3 files changed, 5 insertions, 12 deletions
diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp index f798c13..8541d18 100644 --- a/lib/CodeGen/MachineVerifier.cpp +++ b/lib/CodeGen/MachineVerifier.cpp @@ -664,15 +664,8 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum) { // Use of a dead register. if (!regsLive.count(Reg)) { if (TargetRegisterInfo::isPhysicalRegister(Reg)) { - // Reserved registers may be used even when 'dead', but allocatable - // registers can't. - // We track the liveness of unreserved, unallocatable registers while - // the machine function is still in SSA form. That lets us check for - // bad EFLAGS uses. After register allocation, the unallocatable - // registers are probably quite wrong. For example, the x87 ST0-ST7 - // registers don't track liveness at all. - if (!isReserved(Reg) && - (MRI->isSSA() || TRI->isInAllocatableClass(Reg))) + // Reserved registers may be used even when 'dead'. + if (!isReserved(Reg)) report("Using an undefined physical register", MO, MONum); } else { BBInfo &MInfo = MBBInfoMap[MI->getParent()]; diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp index 4fc711e..9e9a145 100644 --- a/lib/CodeGen/RegisterScavenging.cpp +++ b/lib/CodeGen/RegisterScavenging.cpp @@ -157,7 +157,7 @@ void RegScavenger::forward() { if (!MO.isReg()) continue; unsigned Reg = MO.getReg(); - if (!Reg || isReserved(Reg) || !TRI->isInAllocatableClass(Reg)) + if (!Reg || isReserved(Reg)) continue; if (MO.isUse()) { @@ -184,7 +184,7 @@ void RegScavenger::forward() { if (!MO.isReg()) continue; unsigned Reg = MO.getReg(); - if (!Reg || isReserved(Reg) || !TRI->isInAllocatableClass(Reg)) + if (!Reg || isReserved(Reg)) continue; if (MO.isUse()) { if (MO.isUndef()) diff --git a/test/CodeGen/X86/vector.ll b/test/CodeGen/X86/vector.ll index 4268d02..46b0e18 100644 --- a/test/CodeGen/X86/vector.ll +++ b/test/CodeGen/X86/vector.ll @@ -1,6 +1,6 @@ ; Test that vectors are scalarized/lowered correctly. ; RUN: llc < %s -march=x86 -mcpu=i386 > %t -; RUN: llc < %s -march=x86 -mcpu=yonah -verify-machineinstrs >> %t +; RUN: llc < %s -march=x86 -mcpu=yonah >> %t %d8 = type <8 x double> %f1 = type <1 x float> |