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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2013-07-01 16:52:55 +0000
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2013-07-01 16:52:55 +0000
commit4c1d023de889428e3ea17767b9a7238901c66eff (patch)
tree1666c6a2a28d4d2b0d855b542b306cf7976eb42f
parentaf679a22923d2b61e3bfb6721bd562b99546bfad (diff)
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[PowerPC] Add some existing instructions to ppc64-encoding-bookII.s
The test case had a couple of FIXMEs where the instruction is in fact already supported by the back-end. In some other case, while the generic form of the instruction is not yet supported, a specialized form is. This adds tests for those already supported instructions / instruction forms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185347 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--test/MC/PowerPC/ppc64-encoding-bookII.s11
1 files changed, 8 insertions, 3 deletions
diff --git a/test/MC/PowerPC/ppc64-encoding-bookII.s b/test/MC/PowerPC/ppc64-encoding-bookII.s
index 63f3a5a..999505b 100644
--- a/test/MC/PowerPC/ppc64-encoding-bookII.s
+++ b/test/MC/PowerPC/ppc64-encoding-bookII.s
@@ -3,11 +3,15 @@
# Cache management instruction
-# FIXME: icbi 2, 3
-# FIXME: icbt 1, 2, 3
+# CHECK: icbi 2, 3 # encoding: [0x7c,0x02,0x1f,0xac]
+ icbi 2, 3
# FIXME: dcbt 2, 3, 10
+# CHECK: dcbt 2, 3 # encoding: [0x7c,0x02,0x1a,0x2c]
+ dcbt 2, 3
# FIXME: dcbtst 2, 3, 10
+# CHECK: dcbtst 2, 3 # encoding: [0x7c,0x02,0x19,0xec]
+ dcbtst 2, 3
# CHECK: dcbz 2, 3 # encoding: [0x7c,0x02,0x1f,0xec]
dcbz 2, 3
# CHECK: dcbst 2, 3 # encoding: [0x7c,0x02,0x18,0x6c]
@@ -16,7 +20,8 @@
# Synchronization instructions
-# FIXME: isync
+# CHECK: isync # encoding: [0x4c,0x00,0x01,0x2c]
+ isync
# FIXME: lbarx 2, 3, 4, 1
# FIXME: lharx 2, 3, 4, 1