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authorChris Lattner <sabre@nondot.org>2008-11-26 00:26:16 +0000
committerChris Lattner <sabre@nondot.org>2008-11-26 00:26:16 +0000
commit4c854315d57fae256e1ca853b48ca6ca50216aa5 (patch)
treea5cfb199a202b4901c74c9c4823cf3e01aa9ad22
parent31e241b2509c66d494c7b2f9c3f80753ab242e5d (diff)
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Teach CodeGenPrepare to look through Bitcast instructions when attempting to
optimize addressing modes. This allows us to optimize things like isel-sink2.ll into: movl 4(%esp), %eax cmpb $0, 4(%eax) jne LBB1_2 ## F LBB1_1: ## TB movl $4, %eax ret LBB1_2: ## F movzbl 7(%eax), %eax ret instead of: _test: movl 4(%esp), %eax cmpb $0, 4(%eax) leal 4(%eax), %eax jne LBB1_2 ## F LBB1_1: ## TB movl $4, %eax ret LBB1_2: ## F movzbl 3(%eax), %eax ret This shrinks (e.g.) 403.gcc from 1133510 to 1128345 lines of .s. Note that the 2008-10-16-SpillerBug.ll testcase is dubious at best, I doubt it is really testing what it thinks it is. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@60068 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Transforms/Scalar/CodeGenPrepare.cpp11
-rw-r--r--test/CodeGen/X86/2008-10-16-SpillerBug.ll2
-rw-r--r--test/CodeGen/X86/isel-sink2.ll16
3 files changed, 28 insertions, 1 deletions
diff --git a/lib/Transforms/Scalar/CodeGenPrepare.cpp b/lib/Transforms/Scalar/CodeGenPrepare.cpp
index 4ba8091..0306b06 100644
--- a/lib/Transforms/Scalar/CodeGenPrepare.cpp
+++ b/lib/Transforms/Scalar/CodeGenPrepare.cpp
@@ -636,6 +636,17 @@ bool AddressingModeMatcher::MatchOperationAddr(User *AddrInst, unsigned Opcode,
TLI.getPointerTy())
return MatchAddr(AddrInst->getOperand(0), Depth);
return false;
+ case Instruction::BitCast:
+ // BitCast is always a noop, and we can handle it as long as it is
+ // int->int or pointer->pointer (we don't want int<->fp or something).
+ if ((isa<PointerType>(AddrInst->getOperand(0)->getType()) ||
+ isa<IntegerType>(AddrInst->getOperand(0)->getType())) &&
+ // Don't touch identity bitcasts. These were probably put here by LSR,
+ // and we don't want to mess around with them. Assume it knows what it
+ // is doing.
+ AddrInst->getOperand(0)->getType() != AddrInst->getType())
+ return MatchAddr(AddrInst->getOperand(0), Depth);
+ return false;
case Instruction::Add: {
// Check to see if we can merge in the RHS then the LHS. If so, we win.
ExtAddrMode BackupAddrMode = AddrMode;
diff --git a/test/CodeGen/X86/2008-10-16-SpillerBug.ll b/test/CodeGen/X86/2008-10-16-SpillerBug.ll
index a66073d..5caad4f 100644
--- a/test/CodeGen/X86/2008-10-16-SpillerBug.ll
+++ b/test/CodeGen/X86/2008-10-16-SpillerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -relocation-model=pic -disable-fp-elim -mtriple=i386-apple-darwin | grep and | grep 7 | grep ebp
+; RUN: llvm-as < %s | llc -relocation-model=pic -disable-fp-elim -mtriple=i386-apple-darwin | grep {andl.*7.*ecx}
%struct.XXDActiveTextureTargets = type { i64, i64, i64, i64, i64, i64 }
%struct.XXDAlphaTest = type { float, i16, i8, i8 }
diff --git a/test/CodeGen/X86/isel-sink2.ll b/test/CodeGen/X86/isel-sink2.ll
new file mode 100644
index 0000000..d8e27e9
--- /dev/null
+++ b/test/CodeGen/X86/isel-sink2.ll
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llc -march=x86 | grep {movzbl.7(%...)}
+; RUN: llvm-as < %s | llc -march=x86 | not grep leal
+
+define i8 @test(i32 *%P) nounwind {
+ %Q = getelementptr i32* %P, i32 1
+ %R = bitcast i32* %Q to i8*
+ %S = load i8* %R
+ %T = icmp eq i8 %S, 0
+ br i1 %T, label %TB, label %F
+TB:
+ ret i8 4
+F:
+ %U = getelementptr i8* %R, i32 3
+ %V = load i8* %U
+ ret i8 %V
+}