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authorRoman Divacky <rdivacky@freebsd.org>2012-09-24 20:47:19 +0000
committerRoman Divacky <rdivacky@freebsd.org>2012-09-24 20:47:19 +0000
commit5236ab3fdd4ce9b9990ef58cd8fac695cfbd0eaf (patch)
tree11864a89b2da901177ec57e5f413de2ad2618cf8
parent00796a1b15a83247e19c2445a6ff7a31e72299a4 (diff)
downloadexternal_llvm-5236ab3fdd4ce9b9990ef58cd8fac695cfbd0eaf.zip
external_llvm-5236ab3fdd4ce9b9990ef58cd8fac695cfbd0eaf.tar.gz
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Specify MachinePointerInfo as refering to the argument value and offset of the
store when handling byval arguments. Thus preventing reordering of the store with load with post-RA scheduler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164553 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/PowerPC/PPCISelLowering.cpp8
-rw-r--r--test/CodeGen/PowerPC/pr13891.ll27
2 files changed, 32 insertions, 3 deletions
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 2e8fa18..239aa2b 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -2048,7 +2048,8 @@ PPCTargetLowering::LowerFormalArguments_Darwin_Or_64SVR4(
SmallVector<SDValue, 8> MemOps;
unsigned nAltivecParamsAtEnd = 0;
- for (unsigned ArgNo = 0, e = Ins.size(); ArgNo != e; ++ArgNo) {
+ Function::const_arg_iterator FuncArg = MF.getFunction()->arg_begin();
+ for (unsigned ArgNo = 0, e = Ins.size(); ArgNo != e; ++ArgNo, ++FuncArg) {
SDValue ArgVal;
bool needsLoad = false;
EVT ObjectVT = Ins[ArgNo].VT;
@@ -2103,7 +2104,8 @@ PPCTargetLowering::LowerFormalArguments_Darwin_Or_64SVR4(
EVT ObjType = (ObjSize == 1 ? MVT::i8 :
(ObjSize == 2 ? MVT::i16 : MVT::i32));
SDValue Store = DAG.getTruncStore(Val.getValue(1), dl, Val, FIN,
- MachinePointerInfo(),
+ MachinePointerInfo(FuncArg,
+ CurArgOffset),
ObjType, false, false, 0);
MemOps.push_back(Store);
++GPR_idx;
@@ -2136,7 +2138,7 @@ PPCTargetLowering::LowerFormalArguments_Darwin_Or_64SVR4(
}
SDValue Store = DAG.getStore(Val.getValue(1), dl, Shifted, FIN,
- MachinePointerInfo(),
+ MachinePointerInfo(FuncArg, ArgOffset),
false, false, 0);
MemOps.push_back(Store);
++GPR_idx;
diff --git a/test/CodeGen/PowerPC/pr13891.ll b/test/CodeGen/PowerPC/pr13891.ll
new file mode 100644
index 0000000..3ae7385
--- /dev/null
+++ b/test/CodeGen/PowerPC/pr13891.ll
@@ -0,0 +1,27 @@
+; RUN: llc < %s | FileCheck %s
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"
+target triple = "powerpc64-unknown-linux-gnu"
+
+%struct.foo = type { i8, i8 }
+
+define void @_Z5check3foos(%struct.foo* nocapture byval %f, i16 signext %i) noinline {
+; CHECK: _Z5check3foos:
+; CHECK: sth 3, {{[0-9]+}}(1)
+; CHECK: lha {{[0-9]+}}, {{[0-9]+}}(1)
+entry:
+ %0 = bitcast %struct.foo* %f to i16*
+ %1 = load i16* %0, align 2
+ %bf.val.sext = ashr i16 %1, 8
+ %cmp = icmp eq i16 %bf.val.sext, %i
+ br i1 %cmp, label %if.end, label %if.then
+
+if.then: ; preds = %entry
+ %conv = sext i16 %bf.val.sext to i32
+ tail call void @exit(i32 %conv)
+ br label %if.end
+
+if.end: ; preds = %entry, %if.then
+ ret void
+}
+
+declare void @exit(i32)