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author | Akira Hatanaka <ahatanaka@mips.com> | 2013-10-28 21:21:36 +0000 |
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committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-10-28 21:21:36 +0000 |
commit | 5956bed6992577d2899b81498b1703e07efc2057 (patch) | |
tree | f739b9dd67c7bc3c4db74e6b69d4caa09958524c | |
parent | 1df3e17fdedab84fcc71413d43120f6780889abc (diff) | |
download | external_llvm-5956bed6992577d2899b81498b1703e07efc2057.zip external_llvm-5956bed6992577d2899b81498b1703e07efc2057.tar.gz external_llvm-5956bed6992577d2899b81498b1703e07efc2057.tar.bz2 |
[mips] Simplify LowerFormalArguments using getRegClassFor.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193540 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 17 |
1 files changed, 2 insertions, 15 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index 031ac71..7a0e666 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -2598,22 +2598,9 @@ MipsTargetLowering::LowerFormalArguments(SDValue Chain, // Arguments stored on registers if (IsRegLoc) { - EVT RegVT = VA.getLocVT(); + MVT RegVT = VA.getLocVT(); unsigned ArgReg = VA.getLocReg(); - const TargetRegisterClass *RC; - - if (RegVT == MVT::i32) - RC = Subtarget->inMips16Mode()? &Mips::CPU16RegsRegClass : - &Mips::GPR32RegClass; - else if (RegVT == MVT::i64) - RC = &Mips::GPR64RegClass; - else if (RegVT == MVT::f32) - RC = &Mips::FGR32RegClass; - else if (RegVT == MVT::f64) - RC = Subtarget->isFP64bit() ? &Mips::FGR64RegClass : - &Mips::AFGR64RegClass; - else - llvm_unreachable("RegVT not supported by FormalArguments Lowering"); + const TargetRegisterClass *RC = getRegClassFor(RegVT); // Transform the arguments stored on // physical registers into virtual ones |