The SparcV9 target no longer uses any pseudoinstructions (SETSW, SETUW,

SETX) or M_PSEUDO_FLAG.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15901 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 1 insertions, 18 deletions

diff --git a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
index 6a68a0b..0737249 100644
--- a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
+++ b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
@@ -256,21 +256,12 @@ void PhyRegAlloc::buildInterferenceGraphs() {
 	LiveRange *LR = LRI->getLiveRangeForValue(*OpI);
 	if (LR) LR->addSpillCost(BBLoopDepthCost);
       } 
-
-      // Mark all operands of pseudo-instructions as interfering with one
-      // another.  This must be done because pseudo-instructions may be
-      // expanded to multiple instructions by the assembler, so all the
-      // operands must get distinct registers.
-      if (TM.getInstrInfo()->isPseudoInstr(MInst->getOpcode()))
-      	addInterf4PseudoInstr(MInst);
-
       // Also add interference for any implicit definitions in a machine
       // instr (currently, only calls have this).
       unsigned NumOfImpRefs =  MInst->getNumImplicitRefs();
       for (unsigned z=0; z < NumOfImpRefs; z++) 
         if (MInst->getImplicitOp(z).isDef())
 	  addInterference( MInst->getImplicitRef(z), &LVSetAI, isCallInst );
-
     } // for all machine instructions in BB
   } // for all BBs in function
 
diff --git a/lib/Target/SparcV9/SparcV9Instr.def b/lib/Target/SparcV9/SparcV9Instr.def
index 3315c13..b0f5502 100644
--- a/lib/Target/SparcV9/SparcV9Instr.def
+++ b/lib/Target/SparcV9/SparcV9Instr.def
@@ -49,13 +49,6 @@
 
 I(NOP, "nop",		0,  -1,  0, false, 0,  1,  SPARC_NONE,  M_NOP_FLAG)
 
-// Synthetic SPARC assembly opcodes for setting a register to a constant.
-// Max immediate constant should be ignored for both these instructions.
-// Use a latency > 1 since this may generate as many as 3 instructions.
-I(SETSW, "setsw",	2,   1,  0, true , 0,  2,  SPARC_IEUN,  M_PSEUDO_FLAG )
-I(SETUW, "setuw",	2,   1,  0, false, 0,  2,  SPARC_IEUN,  M_PSEUDO_FLAG )
-I(SETX,  "setx",	3,   2,  0, true,  0,  2,  SPARC_IEUN,  M_PSEUDO_FLAG )
-
 // Set high-order bits of register and clear low-order bits
 I(SETHI, "sethi",	2,  1, B22, false, 0,  1,  SPARC_IEUN,  0)
 
diff --git a/lib/Target/SparcV9/SparcV9InstrInfo.h b/lib/Target/SparcV9/SparcV9InstrInfo.h
index 16d80a7..a26da5b 100644
--- a/lib/Target/SparcV9/SparcV9InstrInfo.h
+++ b/lib/Target/SparcV9/SparcV9InstrInfo.h
@@ -50,8 +50,7 @@ public:
       // last store opcode
       assert(! this->isStore((MachineOpCode) V9::STXFSRi + 1));
 
-      if (opCode == V9::SETSW || opCode == V9::SETUW ||
-          opCode == V9::SETX  || opCode == V9::SETHI)
+      if (opCode == V9::SETHI)
         return 0;
       if (opCode >= V9::STBr && opCode <= V9::STXFSRi)
         return 2;