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| author | Richard Osborne <richard@xmos.com> | 2011-02-09 13:22:12 +0000 |
|---|---|---|
| committer | Richard Osborne <richard@xmos.com> | 2011-02-09 13:22:12 +0000 |
| commit | 59982f3ffcc853a2c66ef674c601ee61dbe205a5 (patch) | |
| tree | af1b6599c2beb7d883acf73a381eeb51ad9ca444 | |
| parent | 3ba974a1c535563bff9a160996ad015a2a56cc05 (diff) | |
| download | external_llvm-59982f3ffcc853a2c66ef674c601ee61dbe205a5.zip external_llvm-59982f3ffcc853a2c66ef674c601ee61dbe205a5.tar.gz external_llvm-59982f3ffcc853a2c66ef674c601ee61dbe205a5.tar.bz2 | |
Add intrinsic for setc instruction on the XCore.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125186 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | include/llvm/IntrinsicsXCore.td | 2 | ||||
| -rw-r--r-- | lib/Target/XCore/XCoreInstrInfo.td | 13 | ||||
| -rw-r--r-- | test/CodeGen/XCore/resources.ll | 14 |
3 files changed, 28 insertions, 1 deletions
diff --git a/include/llvm/IntrinsicsXCore.td b/include/llvm/IntrinsicsXCore.td index 1222650..97bac1d 100644 --- a/include/llvm/IntrinsicsXCore.td +++ b/include/llvm/IntrinsicsXCore.td @@ -31,4 +31,6 @@ let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.". [NoCapture<0>]>; def int_xcore_setd : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty], [NoCapture<0>]>; + def int_xcore_setc : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty], + [NoCapture<0>]>; } diff --git a/lib/Target/XCore/XCoreInstrInfo.td b/lib/Target/XCore/XCoreInstrInfo.td index 581f384..38cc734 100644 --- a/lib/Target/XCore/XCoreInstrInfo.td +++ b/lib/Target/XCore/XCoreInstrInfo.td @@ -610,8 +610,15 @@ def LDC_lru6 : _FLRU6< [(set GRRegs:$dst, immU16:$b)]>; } +def SETC_ru6 : _FRU6<(outs), (ins GRRegs:$r, i32imm:$val), + "setc res[$r], $val", + [(int_xcore_setc GRRegs:$r, immU6:$val)]>; + +def SETC_lru6 : _FLRU6<(outs), (ins GRRegs:$r, i32imm:$val), + "setc res[$r], $val", + [(int_xcore_setc GRRegs:$r, immU16:$val)]>; + // Operand register - U6 -// TODO setc let isBranch = 1, isTerminator = 1 in { defm BRFT: FRU6_LRU6_branch<"bt">; defm BRBT: FRU6_LRU6_branch<"bt">; @@ -806,6 +813,10 @@ def CLZ_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src), "clz $dst, $src", [(set GRRegs:$dst, (ctlz GRRegs:$src))]>; +def SETC_l2r : _FRU6<(outs), (ins GRRegs:$r, GRRegs:$val), + "setc res[$r], $val", + [(int_xcore_setc GRRegs:$r, GRRegs:$val)]>; + // One operand short // TODO edu, eeu, waitet, waitef, tstart, msync, mjoin, syncr, clrtp // setdp, setcp, setv, setev, kcall diff --git a/test/CodeGen/XCore/resources.ll b/test/CodeGen/XCore/resources.ll index 878f318..3114bdc 100644 --- a/test/CodeGen/XCore/resources.ll +++ b/test/CodeGen/XCore/resources.ll @@ -95,3 +95,17 @@ define void @setd(i8 addrspace(1)* %r, i32 %value) { call void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value) ret void } + +define void @setc(i8 addrspace(1)* %r, i32 %value) { +; CHECK: setc: +; CHECK: setc res[r0], r1 + call void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 %value) + ret void +} + +define void @setci(i8 addrspace(1)* %r) { +; CHECK: setci: +; CHECK: setc res[r0], 2 + call void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 2) + ret void +} |