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| author | Evan Cheng <evan.cheng@apple.com> | 2009-11-03 23:13:34 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-11-03 23:13:34 +0000 |
| commit | 5a1cd36019ca3cbae811f2800631b5b56a9ffdc2 (patch) | |
| tree | 6b1a1bdb7fcfa59a656d02aaddffbe6f0dd97dde | |
| parent | 7fc4026d975e9aa150e2c4486cc81dc8011b4a6b (diff) | |
| download | external_llvm-5a1cd36019ca3cbae811f2800631b5b56a9ffdc2.zip external_llvm-5a1cd36019ca3cbae811f2800631b5b56a9ffdc2.tar.gz external_llvm-5a1cd36019ca3cbae811f2800631b5b56a9ffdc2.tar.bz2 | |
Fix t2Int_eh_sjlj_setjmp. Immediate form of orr is a 32-bit instruction. So it should be 22 bytes instead of 20 bytes long.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85965 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMBaseInstrInfo.cpp | 2 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp index c9b939d..7c5b0f0 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -448,7 +448,7 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const { case ARM::Int_eh_sjlj_setjmp: return 24; case ARM::t2Int_eh_sjlj_setjmp: - return 20; + return 22; case ARM::BR_JTr: case ARM::BR_JTm: case ARM::BR_JTadd: diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 26b5759..5bfda37 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -1082,7 +1082,7 @@ let Defs = AddrModeNone, SizeSpecial, NoItinerary, "str.w\tsp, [$src, #+8] @ eh_setjmp begin\n" "\tadr\tr12, 0f\n" - "\torr\tr12, #1\n" + "\torr.w\tr12, r12, #1\n" "\tstr.w\tr12, [$src, #+4]\n" "\tmovs\tr0, #0\n" "\tb\t1f\n" |