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| author | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-08-28 23:02:39 +0000 |
|---|---|---|
| committer | Vikram S. Adve <vadve@cs.uiuc.edu> | 2001-08-28 23:02:39 +0000 |
| commit | 5b79591450c47920139705712a402251af7eed79 (patch) | |
| tree | 63b087a555c7efc39e4e405241d6b955a3cc2823 | |
| parent | 8b5f6cc0a4805c8cc64c22b02d34009452ebeef2 (diff) | |
| download | external_llvm-5b79591450c47920139705712a402251af7eed79.zip external_llvm-5b79591450c47920139705712a402251af7eed79.tar.gz external_llvm-5b79591450c47920139705712a402251af7eed79.tar.bz2 | |
Moved function PrintMachineInstructions here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@392 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/MachineInstr.cpp | 42 |
1 files changed, 37 insertions, 5 deletions
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index 85440ae..d636d3a 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -12,10 +12,19 @@ // 7/2/01 - Vikram Adve - Created //**************************************************************************/ -#include "llvm/CodeGen/MachineInstr.h" + +//************************** System Include Files ***************************/ + +#include <strstream> + + +//*************************** User Include Files ***************************/ + +#include "llvm/Method.h" #include "llvm/ConstPoolVals.h" #include "llvm/Instruction.h" -#include <strstream> +#include "llvm/CodeGen/MachineInstr.h" + //************************ Class Implementations **************************/ @@ -204,7 +213,7 @@ Set3OperandsFromInstrJUNK(MachineInstr* minstr, unsigned returnFlags = 0x0; - // Check if operand 1 is 0 and if so, try to use the register that gives 0, if any. + // Check if operand 1 is 0. If so, try to use a hardwired 0 register. Value* op1Value = vmInstrNode->leftChild()->getValue(); bool isValidConstant; int64_t intValue = GetConstantValueAsSignedInt(op1Value, isValidConstant); @@ -220,8 +229,8 @@ Set3OperandsFromInstrJUNK(MachineInstr* minstr, op1Value); } - // Check if operand 2 (if any) fits in the immediate field of the instruction, - // of if it is 0 and can use a dedicated machine register + // Check if operand 2 (if any) fits in the immed. field of the instruction, + // or if it is 0 and can use a dedicated machine register if (op2Position >= 0) { Value* op2Value = vmInstrNode->rightChild()->getValue(); @@ -333,3 +342,26 @@ ChooseRegOrImmed(Value* val, return opType; } + + +void +PrintMachineInstructions(Method* method) +{ + cout << "\n" << method->getReturnType() + << " \"" << method->getName() << "\"" << endl; + + for (Method::const_iterator BI = method->begin(); BI != method->end(); ++BI) + { + BasicBlock* bb = *BI; + cout << "\n" + << (bb->hasName()? bb->getName() : "Label") + << " (" << bb << ")" << ":" + << endl; + + MachineCodeForBasicBlock& mvec = bb->getMachineInstrVec(); + for (unsigned i=0; i < mvec.size(); i++) + cout << "\t" << *mvec[i] << endl; + } + cout << endl << "End method \"" << method->getName() << "\"" + << endl << endl; +} |