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authorEvan Cheng <evan.cheng@apple.com>2009-11-13 20:36:40 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-11-13 20:36:40 +0000
commit5cec5f651fae320adef8d66650851fa86587a88d (patch)
tree00bf78eb477e60ecd8329301b3cf7d57200bf238
parente6e30350b685bd4c9eddf4a88cb5dac41ee61eb8 (diff)
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Fix PR5410: LiveVariables lost subreg def:
D0<def,dead> = ... ... = S0<use, kill> S0<def> = ... ... D0<def> = The first D0 def is correctly marked dead, however, livevariables should have added an implicit def of S0 or we end up with a use without a def. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@88690 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/CodeGen/LiveVariables.cpp8
-rw-r--r--test/CodeGen/ARM/2009-11-13-CoalescerCrash.ll20
2 files changed, 27 insertions, 1 deletions
diff --git a/lib/CodeGen/LiveVariables.cpp b/lib/CodeGen/LiveVariables.cpp
index cba0371..16a79bb 100644
--- a/lib/CodeGen/LiveVariables.cpp
+++ b/lib/CodeGen/LiveVariables.cpp
@@ -230,8 +230,9 @@ MachineInstr *LiveVariables::FindLastPartialDef(unsigned Reg,
/// implicit defs to a machine instruction if there was an earlier def of its
/// super-register.
void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr *MI) {
+ MachineInstr *LastDef = PhysRegDef[Reg];
// If there was a previous use or a "full" def all is well.
- if (!PhysRegDef[Reg] && !PhysRegUse[Reg]) {
+ if (!LastDef && !PhysRegUse[Reg]) {
// Otherwise, the last sub-register def implicitly defines this register.
// e.g.
// AH =
@@ -265,6 +266,11 @@ void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr *MI) {
}
}
}
+ else if (LastDef && !PhysRegUse[Reg] &&
+ !LastDef->findRegisterDefOperand(Reg))
+ // Last def defines the super register, add an implicit def of reg.
+ LastDef->addOperand(MachineOperand::CreateReg(Reg,
+ true/*IsDef*/, true/*IsImp*/));
// Remember this use.
PhysRegUse[Reg] = MI;
diff --git a/test/CodeGen/ARM/2009-11-13-CoalescerCrash.ll b/test/CodeGen/ARM/2009-11-13-CoalescerCrash.ll
new file mode 100644
index 0000000..efc4be1
--- /dev/null
+++ b/test/CodeGen/ARM/2009-11-13-CoalescerCrash.ll
@@ -0,0 +1,20 @@
+; RUN: llc -mtriple=armv7-eabi -mcpu=cortex-a8 < %s
+; PR5410
+
+%0 = type { float, float, float, float }
+%pln = type { %vec, float }
+%vec = type { [4 x float] }
+
+define arm_aapcs_vfpcc float @aaa(%vec* nocapture %ustart, %vec* nocapture %udir, %vec* nocapture %vstart, %vec* nocapture %vdir, %vec* %upoint, %vec* %vpoint) {
+entry:
+ br i1 undef, label %bb81, label %bb48
+
+bb48: ; preds = %entry
+ %0 = call arm_aapcs_vfpcc %0 @bbb(%pln* undef, %vec* %vstart, %vec* undef) nounwind ; <%0> [#uses=0]
+ ret float 0.000000e+00
+
+bb81: ; preds = %entry
+ ret float 0.000000e+00
+}
+
+declare arm_aapcs_vfpcc %0 @bbb(%pln* nocapture, %vec* nocapture, %vec* nocapture) nounwind