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authorEvan Cheng <evan.cheng@apple.com>2009-05-30 08:43:27 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-05-30 08:43:27 +0000
commit5f76113870a1a7e853d5618ae25eeea3afc0851f (patch)
tree5b5d6a7e4aa32c3f29faba0ed5f74eac1ae9329c
parent29aaef84400cb8c822c5cb4477c05b39eaab36ed (diff)
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(i64 (zext (srl GR32 8))) -> movzbl AH is not safe since srl 8 only clear the top 8 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72618 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/X86/X86Instr64bit.td7
-rw-r--r--test/CodeGen/X86/2009-05-30-ISelBug.ll28
2 files changed, 28 insertions, 7 deletions
diff --git a/lib/Target/X86/X86Instr64bit.td b/lib/Target/X86/X86Instr64bit.td
index f58ba8d..0babaa4 100644
--- a/lib/Target/X86/X86Instr64bit.td
+++ b/lib/Target/X86/X86Instr64bit.td
@@ -1607,13 +1607,6 @@ def : Pat<(and (srl_su GR32:$src, (i8 8)), (i32 255)),
(EXTRACT_SUBREG (COPY_TO_REGCLASS GR32:$src, GR32_ABCD),
x86_subreg_8bit_hi))>,
Requires<[In64BitMode]>;
-def : Pat<(i64 (zext (srl_su GR32:$src, (i8 8)))),
- (SUBREG_TO_REG
- (i64 0),
- (MOVZX32_NOREXrr8
- (EXTRACT_SUBREG (COPY_TO_REGCLASS GR32:$src, GR32_ABCD),
- x86_subreg_8bit_hi)),
- x86_subreg_32bit)>;
def : Pat<(srl_su GR16:$src, (i8 8)),
(EXTRACT_SUBREG
(MOVZX32_NOREXrr8
diff --git a/test/CodeGen/X86/2009-05-30-ISelBug.ll b/test/CodeGen/X86/2009-05-30-ISelBug.ll
new file mode 100644
index 0000000..373f91f
--- /dev/null
+++ b/test/CodeGen/X86/2009-05-30-ISelBug.ll
@@ -0,0 +1,28 @@
+; RUN: llvm-as < %s | llc -march=x86-64 | not grep {movzbl %\[abcd\]h,}
+
+define void @BZ2_bzDecompress_bb5_2E_outer_bb35_2E_i_bb54_2E_i(i32*, i32 %c_nblock_used.2.i, i32 %.reload51, i32* %.out, i32* %.out1, i32* %.out2, i32* %.out3) nounwind {
+newFuncRoot:
+ br label %bb54.i
+
+bb35.i.backedge.exitStub: ; preds = %bb54.i
+ store i32 %6, i32* %.out
+ store i32 %10, i32* %.out1
+ store i32 %11, i32* %.out2
+ store i32 %12, i32* %.out3
+ ret void
+
+bb54.i: ; preds = %newFuncRoot
+ %1 = zext i32 %.reload51 to i64 ; <i64> [#uses=1]
+ %2 = getelementptr i32* %0, i64 %1 ; <i32*> [#uses=1]
+ %3 = load i32* %2, align 4 ; <i32> [#uses=2]
+ %4 = lshr i32 %3, 8 ; <i32> [#uses=1]
+ %5 = and i32 %3, 255 ; <i32> [#uses=1]
+ %6 = add i32 %5, 4 ; <i32> [#uses=1]
+ %7 = zext i32 %4 to i64 ; <i64> [#uses=1]
+ %8 = getelementptr i32* %0, i64 %7 ; <i32*> [#uses=1]
+ %9 = load i32* %8, align 4 ; <i32> [#uses=2]
+ %10 = and i32 %9, 255 ; <i32> [#uses=1]
+ %11 = lshr i32 %9, 8 ; <i32> [#uses=1]
+ %12 = add i32 %c_nblock_used.2.i, 5 ; <i32> [#uses=1]
+ br label %bb35.i.backedge.exitStub
+}