aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorJoel Jones <joel_k_jones@apple.com>2013-02-10 23:56:30 +0000
committerJoel Jones <joel_k_jones@apple.com>2013-02-10 23:56:30 +0000
commit612779eb83a98cec1e11dc823ba2e6420edbce54 (patch)
tree2206f461923d348d695cb7a7683dc3f3da3f4a6b
parentf5844a75154e73a2302767eeecf3b3401e157bb3 (diff)
downloadexternal_llvm-612779eb83a98cec1e11dc823ba2e6420edbce54.zip
external_llvm-612779eb83a98cec1e11dc823ba2e6420edbce54.tar.gz
external_llvm-612779eb83a98cec1e11dc823ba2e6420edbce54.tar.bz2
Spelling correction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174852 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/AArch64/AArch64ISelLowering.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/AArch64/AArch64ISelLowering.cpp b/lib/Target/AArch64/AArch64ISelLowering.cpp
index 071b432..ff28dc1 100644
--- a/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -2691,7 +2691,7 @@ static bool findEXTRHalf(SDValue N, SDValue &Src, uint32_t &ShiftAmount,
return true;
}
-/// EXTR instruciton extracts a contiguous chunk of bits from two existing
+/// EXTR instruction extracts a contiguous chunk of bits from two existing
/// registers viewed as a high/low pair. This function looks for the pattern:
/// (or (shl VAL1, #N), (srl VAL2, #RegWidth-N)) and replaces it with an
/// EXTR. Can't quite be done in TableGen because the two immediates aren't