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author | Cameron Zwarich <zwarich@apple.com> | 2011-05-18 23:03:10 +0000 |
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committer | Cameron Zwarich <zwarich@apple.com> | 2011-05-18 23:03:10 +0000 |
commit | 631fcbf81013c2cd1cf5e5ebea596213e6ac833e (patch) | |
tree | e37c7f7c430941a4a52615739bd6ff5a5382aa84 | |
parent | f0542c07f7be612c5177243049dc23d24bde8852 (diff) | |
download | external_llvm-631fcbf81013c2cd1cf5e5ebea596213e6ac833e.zip external_llvm-631fcbf81013c2cd1cf5e5ebea596213e6ac833e.tar.gz external_llvm-631fcbf81013c2cd1cf5e5ebea596213e6ac833e.tar.bz2 |
Add missing mayLoad / mayStore flags to instruction definitions without patterns,
which fixes all of the CodeGen/MBlaze verifier failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131595 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/MBlaze/MBlazeInstrInfo.td | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/MBlaze/MBlazeInstrInfo.td b/lib/Target/MBlaze/MBlazeInstrInfo.td index 896e8ea..950f2d7 100644 --- a/lib/Target/MBlaze/MBlazeInstrInfo.td +++ b/lib/Target/MBlaze/MBlazeInstrInfo.td @@ -245,20 +245,25 @@ class PatCmp<bits<6> op, bits<11> flags, string instr_asm> : //===----------------------------------------------------------------------===// // Memory Access Instructions //===----------------------------------------------------------------------===// + +let mayLoad = 1 in { class LoadM<bits<6> op, bits<11> flags, string instr_asm> : TA<op, flags, (outs GPR:$dst), (ins memrr:$addr), !strconcat(instr_asm, " $dst, $addr"), [], IIC_MEMl>; +} class LoadMI<bits<6> op, string instr_asm, PatFrag OpNode> : TB<op, (outs GPR:$dst), (ins memri:$addr), !strconcat(instr_asm, " $dst, $addr"), [(set (i32 GPR:$dst), (OpNode iaddr:$addr))], IIC_MEMl>; +let mayStore = 1 in { class StoreM<bits<6> op, bits<11> flags, string instr_asm> : TA<op, flags, (outs), (ins GPR:$dst, memrr:$addr), !strconcat(instr_asm, " $dst, $addr"), [], IIC_MEMs>; +} class StoreMI<bits<6> op, string instr_asm, PatFrag OpNode> : TB<op, (outs), (ins GPR:$dst, memri:$addr), |