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| author | Bill Wendling <isanbard@gmail.com> | 2008-08-25 18:20:52 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2008-08-25 18:20:52 +0000 |
| commit | 635623ccf5c95bcb72f9af8ca9777f25750db44e (patch) | |
| tree | 108e28b2c886a448122151fa52f794dfbcffc9b4 | |
| parent | 6684555138d8b15c3d52a6fd42263c211f05e47f (diff) | |
| download | external_llvm-635623ccf5c95bcb72f9af8ca9777f25750db44e.zip external_llvm-635623ccf5c95bcb72f9af8ca9777f25750db44e.tar.gz external_llvm-635623ccf5c95bcb72f9af8ca9777f25750db44e.tar.bz2 | |
MOVQ2DQ and MOVQ2DQ use SSE2. We should conditionalize the use of these
instructions on having SSE2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55317 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrFormats.td | 12 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrMMX.td | 6 |
2 files changed, 11 insertions, 7 deletions
diff --git a/lib/Target/X86/X86InstrFormats.td b/lib/Target/X86/X86InstrFormats.td index 33f38e3..c26ea01 100644 --- a/lib/Target/X86/X86InstrFormats.td +++ b/lib/Target/X86/X86InstrFormats.td @@ -157,16 +157,20 @@ class PSIi8<bits<8> o, Format F, dag outs, dag ins, string asm, // SSE2 Instruction Templates: // -// SDI - SSE2 instructions with XD prefix. -// SDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix. -// PDI - SSE2 instructions with TB and OpSize prefixes. -// PDIi8 - SSE2 instructions with ImmT == Imm8 and TB and OpSize prefixes. +// SDI - SSE2 instructions with XD prefix. +// SDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix. +// SSDIi8 - SSE2 instructions with ImmT == Imm8 and XS prefix. +// PDI - SSE2 instructions with TB and OpSize prefixes. +// PDIi8 - SSE2 instructions with ImmT == Imm8 and TB and OpSize prefixes. class SDI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag> pattern> : I<o, F, outs, ins, asm, pattern>, XD, Requires<[HasSSE2]>; class SDIi8<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag> pattern> : Ii8<o, F, outs, ins, asm, pattern>, XD, Requires<[HasSSE2]>; +class SSDIi8<bits<8> o, Format F, dag outs, dag ins, string asm, + list<dag> pattern> + : Ii8<o, F, outs, ins, asm, pattern>, XS, Requires<[HasSSE2]>; class PDI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag> pattern> : I<o, F, outs, ins, asm, pattern>, TB, OpSize, Requires<[HasSSE2]>; class PDIi8<bits<8> o, Format F, dag outs, dag ins, string asm, diff --git a/lib/Target/X86/X86InstrMMX.td b/lib/Target/X86/X86InstrMMX.td index e8da916..bf0dcd2 100644 --- a/lib/Target/X86/X86InstrMMX.td +++ b/lib/Target/X86/X86InstrMMX.td @@ -173,15 +173,15 @@ def MMX_MOVQ64mr : MMXI<0x7F, MRMDestMem, (outs), (ins i64mem:$dst, VR64:$src), "movq\t{$src, $dst|$dst, $src}", [(store (v1i64 VR64:$src), addr:$dst)]>; -def MMX_MOVDQ2Qrr : MMXID<0xD6, MRMDestMem, (outs VR64:$dst), (ins VR128:$src), +def MMX_MOVDQ2Qrr : SDIi8<0xD6, MRMDestMem, (outs VR64:$dst), (ins VR128:$src), "movdq2q\t{$src, $dst|$dst, $src}", [(set VR64:$dst, (v1i64 (bitconvert (i64 (vector_extract (v2i64 VR128:$src), (iPTR 0))))))]>; -def MMX_MOVQ2DQrr : MMXIS<0xD6, MRMDestMem, (outs VR128:$dst), (ins VR64:$src), - "movq2dq\t{$src, $dst|$dst, $src}", +def MMX_MOVQ2DQrr : SSDIi8<0xD6, MRMDestMem, (outs VR128:$dst), (ins VR64:$src), + "movq2dq\t{$src, $dst|$dst, $src}", [(set VR128:$dst, (v2i64 (vector_shuffle immAllZerosV, (v2i64 (scalar_to_vector (i64 (bitconvert VR64:$src)))), |