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authorEvan Cheng <evan.cheng@apple.com>2009-08-11 08:47:46 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-08-11 08:47:46 +0000
commit64cfb7f95ab073d275cd96a2fb5d6a5b57abe14c (patch)
tree962a8abd4cc055e979826e3b9be936f27e5fbbd8
parentbdb59bb75c1fbdd45e1efa4576d2faa60dfb15d6 (diff)
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80 column violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78657 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMInstrThumb2.td4
1 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td
index f7ea0d3..7dd77df 100644
--- a/lib/Target/ARM/ARMInstrThumb2.td
+++ b/lib/Target/ARM/ARMInstrThumb2.td
@@ -597,8 +597,8 @@ defm t2STRH : T2I_st<"strh", BinOpFrag<(truncstorei16 node:$LHS, node:$RHS)>>;
// Store doubleword
let mayLoad = 1 in
-def t2STRDi8 : T2Ii8s4<(outs), (ins GPR:$src, t2addrmode_imm8s4:$addr), IIC_iStore,
- "strd", " $src, $addr", []>;
+def t2STRDi8 : T2Ii8s4<(outs), (ins GPR:$src, t2addrmode_imm8s4:$addr),
+ IIC_iStore, "strd", " $src, $addr", []>;
// Indexed stores
def t2STR_PRE : T2Iidxldst<(outs GPR:$base_wb),