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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-07-14 23:58:21 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-07-14 23:58:21 +0000 |
commit | 6881898eb5886243c17151ed45ffb5bb57466270 (patch) | |
tree | 9436716268bd688fc4a9bd9a1b755de2e05e4959 | |
parent | 273ff31e134d48c8247e981d30e214e82568ff86 (diff) | |
download | external_llvm-6881898eb5886243c17151ed45ffb5bb57466270.zip external_llvm-6881898eb5886243c17151ed45ffb5bb57466270.tar.gz external_llvm-6881898eb5886243c17151ed45ffb5bb57466270.tar.bz2 |
Last COPY conversion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108387 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86FastISel.cpp | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index f9eb82c..ce13707 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -1279,12 +1279,11 @@ bool X86FastISel::X86SelectTrunc(const Instruction *I) { return false; // First issue a copy to GR16_ABCD or GR32_ABCD. - unsigned CopyOpc = (SrcVT == MVT::i16) ? X86::MOV16rr : X86::MOV32rr; const TargetRegisterClass *CopyRC = (SrcVT == MVT::i16) ? X86::GR16_ABCDRegisterClass : X86::GR32_ABCDRegisterClass; unsigned CopyReg = createResultReg(CopyRC); - BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(CopyOpc), CopyReg) - .addReg(InputReg); + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY), + CopyReg).addReg(InputReg); // Then issue an extract_subreg. unsigned ResultReg = FastEmitInst_extractsubreg(MVT::i8, |