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authorEvan Cheng <evan.cheng@apple.com>2009-07-23 07:58:08 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-07-23 07:58:08 +0000
commit697712c7d42cbd30fe07367abdbfa0620666e3a3 (patch)
tree9c1e7f9002098106db3bbcfe21229bf6919c204d
parentf0395160f934eb278aa960de22dada5b297ddd8a (diff)
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80 col violation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76872 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMBaseRegisterInfo.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/lib/Target/ARM/ARMBaseRegisterInfo.cpp
index 7002ff7..9e21f3c 100644
--- a/lib/Target/ARM/ARMBaseRegisterInfo.cpp
+++ b/lib/Target/ARM/ARMBaseRegisterInfo.cpp
@@ -1407,11 +1407,13 @@ emitEpilogue(MachineFunction &MF,
AFI->getDPRCalleeSavedAreaOffset()||
hasFP(MF)) {
if (NumBytes)
- BuildMI(MBB, MBBI, dl, TII.get(getOpcode(ARMII::SUBri)), ARM::SP).addReg(FramePtr)
+ BuildMI(MBB, MBBI, dl, TII.get(getOpcode(ARMII::SUBri)), ARM::SP)
+ .addReg(FramePtr)
.addImm(NumBytes)
.addImm((unsigned)ARMCC::AL).addReg(0).addReg(0);
else
- BuildMI(MBB, MBBI, dl, TII.get(getOpcode(ARMII::MOVr)), ARM::SP).addReg(FramePtr)
+ BuildMI(MBB, MBBI, dl, TII.get(getOpcode(ARMII::MOVr)), ARM::SP)
+ .addReg(FramePtr)
.addImm((unsigned)ARMCC::AL).addReg(0).addReg(0);
}
} else if (NumBytes) {