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authorDmitri Gribenko <gribozavr@gmail.com>2012-11-29 17:41:05 +0000
committerDmitri Gribenko <gribozavr@gmail.com>2012-11-29 17:41:05 +0000
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Documentation for tblgen: formatting
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168904 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--docs/CommandGuide/tblgen.rst139
1 files changed, 41 insertions, 98 deletions
diff --git a/docs/CommandGuide/tblgen.rst b/docs/CommandGuide/tblgen.rst
index 2d19167..1858ee4 100644
--- a/docs/CommandGuide/tblgen.rst
+++ b/docs/CommandGuide/tblgen.rst
@@ -1,186 +1,129 @@
tblgen - Target Description To C++ Code Generator
=================================================
-
SYNOPSIS
--------
-
-**tblgen** [*options*] [*filename*]
-
+:program:`tblgen` [*options*] [*filename*]
DESCRIPTION
-----------
+:program:`tblgen` translates from target description (``.td``) files into C++
+code that can be included in the definition of an LLVM target library. Most
+users of LLVM will not need to use this program. It is only for assisting with
+writing an LLVM target backend.
-**tblgen** translates from target description (.td) files into C++ code that can
-be included in the definition of an LLVM target library. Most users of LLVM will
-not need to use this program. It is only for assisting with writing an LLVM
-target backend.
-
-The input and output of **tblgen** is beyond the scope of this short
-introduction. Please see the *CodeGeneration* page in the LLVM documentation.
-
-The *filename* argument specifies the name of a Target Description (.td) file
-to read as input.
+The input and output of :program:`tblgen` is beyond the scope of this short
+introduction. Please see :doc:`../TableGenFundamentals`.
+The *filename* argument specifies the name of a Target Description (``.td``)
+file to read as input.
OPTIONS
-------
-
-
-**-help**
+.. option:: -help
Print a summary of command line options.
+.. option:: -o filename
+ Specify the output file name. If ``filename`` is ``-``, then
+ :program:`tblgen` sends its output to standard output.
-**-o** *filename*
-
- Specify the output file name. If *filename* is ``-``, then **tblgen**
- sends its output to standard output.
-
-
-
-**-I** *directory*
-
- Specify where to find other target description files for inclusion. The
- *directory* value should be a full or partial path to a directory that contains
- target description files.
-
-
-
-**-asmparsernum** *N*
+.. option:: -I directory
- Make -gen-asm-parser emit assembly writer number *N*.
+ Specify where to find other target description files for inclusion. The
+ ``directory`` value should be a full or partial path to a directory that
+ contains target description files.
+.. option:: -asmparsernum N
+ Make -gen-asm-parser emit assembly writer number ``N``.
-**-asmwriternum** *N*
+.. option:: -asmwriternum N
- Make -gen-asm-writer emit assembly writer number *N*.
+ Make -gen-asm-writer emit assembly writer number ``N``.
-
-
-**-class** *class Name*
+.. option:: -class className
Print the enumeration list for this class.
-
-
-**-print-records**
+.. option:: -print-records
Print all records to standard output (default).
-
-
-**-print-enums**
+.. option:: -print-enums
Print enumeration values for a class
-
-
-**-print-sets**
+.. option:: -print-sets
Print expanded sets for testing DAG exprs.
-
-
-**-gen-emitter**
+.. option:: -gen-emitter
Generate machine code emitter.
-
-
-**-gen-register-info**
+.. option:: -gen-register-info
Generate registers and register classes info.
-
-
-**-gen-instr-info**
+.. option:: -gen-instr-info
Generate instruction descriptions.
-
-
-**-gen-asm-writer**
+.. option:: -gen-asm-writer
Generate the assembly writer.
-
-
-**-gen-disassembler**
+.. option:: -gen-disassembler
Generate disassembler.
-
-
-**-gen-pseudo-lowering**
+.. option:: -gen-pseudo-lowering
Generate pseudo instruction lowering.
-
-
-**-gen-dag-isel**
+.. option:: -gen-dag-isel
Generate a DAG (Directed Acycle Graph) instruction selector.
-
-
-**-gen-asm-matcher**
+.. option:: -gen-asm-matcher
Generate assembly instruction matcher.
-
-
-**-gen-dfa-packetizer**
+.. option:: -gen-dfa-packetizer
Generate DFA Packetizer for VLIW targets.
-
-
-**-gen-fast-isel**
+.. option:: -gen-fast-isel
Generate a "fast" instruction selector.
-
-
-**-gen-subtarget**
+.. option:: -gen-subtarget
Generate subtarget enumerations.
-
-
-**-gen-intrinsic**
+.. option:: -gen-intrinsic
Generate intrinsic information.
-
-
-**-gen-tgt-intrinsic**
+.. option:: -gen-tgt-intrinsic
Generate target intrinsic information.
-
-
-**-gen-enhanced-disassembly-info**
+.. option:: -gen-enhanced-disassembly-info
Generate enhanced disassembly info.
-
-
-**-version**
+.. option:: -version
Show the version number of this program.
-
-
-
EXIT STATUS
-----------
-
-If **tblgen** succeeds, it will exit with 0. Otherwise, if an error
+If :program:`tblgen` succeeds, it will exit with 0. Otherwise, if an error
occurs, it will exit with a non-zero value.