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| author | Dan Gohman <gohman@apple.com> | 2010-11-09 01:54:35 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2010-11-09 01:54:35 +0000 |
| commit | 6a559cd6959bef28d20acef2129e5510bcc12bb8 (patch) | |
| tree | 46cbdb94111f9f9d13a07eb18b71de8dcabf8a18 | |
| parent | be7c5116a754b4c539b4e385006452af13fe6df1 (diff) | |
| download | external_llvm-6a559cd6959bef28d20acef2129e5510bcc12bb8.zip external_llvm-6a559cd6959bef28d20acef2129e5510bcc12bb8.tar.gz external_llvm-6a559cd6959bef28d20acef2129e5510bcc12bb8.tar.bz2 | |
Fix DAGCombiner to avoid folding a sext-in-reg or similar through a shl
in order to fold it into a load.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118471 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 1 | ||||
| -rw-r--r-- | test/CodeGen/X86/narrow-shl-load.ll | 43 |
2 files changed, 39 insertions, 5 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 7154d9d..1a0f503 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -4120,6 +4120,7 @@ SDValue DAGCombiner::ReduceLoadWidth(SDNode *N) { // we can fold the truncate through the shift. unsigned ShLeftAmt = 0; if (ShAmt == 0 && N0.getOpcode() == ISD::SHL && N0.hasOneUse() && + ExtVT == VT && TLI.isNarrowingProfitable(N0.getValueType(), VT)) { if (ConstantSDNode *N01 = dyn_cast<ConstantSDNode>(N0.getOperand(1))) { ShLeftAmt = N01->getZExtValue(); diff --git a/test/CodeGen/X86/narrow-shl-load.ll b/test/CodeGen/X86/narrow-shl-load.ll index d67a6a5..53b0388 100644 --- a/test/CodeGen/X86/narrow-shl-load.ll +++ b/test/CodeGen/X86/narrow-shl-load.ll @@ -1,12 +1,11 @@ -; RUN: llc -march=x86-64 < %s - -; DAGCombiner should fold this code in finite time. - -; rdar://8606584 +; RUN: llc -march=x86-64 < %s | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-pc-linux-gnu" +; DAGCombiner should fold this code in finite time. +; rdar://8606584 + define void @D() nounwind readnone { bb.nph: br label %while.cond @@ -30,3 +29,37 @@ while.cond: ; preds = %while.cond, %bb.nph while.end: ; preds = %while.cond ret void } + + +; DAGCombiner shouldn't fold the sdiv (ashr) away. +; rdar://8636812 +; CHECK: main: +; CHECK: sarl + +define i32 @main() nounwind { +entry: + %i = alloca i32, align 4 + %j = alloca i8, align 1 + store i32 127, i32* %i, align 4 + store i8 0, i8* %j, align 1 + %tmp3 = load i32* %i, align 4 + %mul = mul nsw i32 %tmp3, 2 + %conv4 = trunc i32 %mul to i8 + %conv5 = sext i8 %conv4 to i32 + %div6 = sdiv i32 %conv5, 2 + %conv7 = trunc i32 %div6 to i8 + %conv9 = sext i8 %conv7 to i32 + %cmp = icmp eq i32 %conv9, -1 + br i1 %cmp, label %if.then, label %if.end + +if.then: ; preds = %entry + ret i32 0 + +if.end: ; preds = %entry + call void @abort() noreturn + unreachable +} + +declare void @abort() noreturn + +declare void @exit(i32) noreturn |