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authorJim Grosbach <grosbach@apple.com>2010-10-13 21:32:30 +0000
committerJim Grosbach <grosbach@apple.com>2010-10-13 21:32:30 +0000
commit6c354fd3f5321f4afddd90543cce46c0a1bd8404 (patch)
tree1cca03d8867be95e811b7c8a7054dc894cc5e962
parentb3af5de2d97c30355b8109e149326b0664d34085 (diff)
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Add a FIXME. The ADR instruction is a bit odd.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116437 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMInstrInfo.td8
1 files changed, 6 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 17374a9..0dd60f8 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -936,8 +936,9 @@ def SETEND : AXI<(outs),(ins setend_op:$end), MiscFrm, NoItinerary,
def DBG : AI<(outs), (ins i32imm:$opt), MiscFrm, NoItinerary, "dbg", "\t$opt",
[/* For disassembly only; pattern left blank */]>,
Requires<[IsARM, HasV7]> {
- let Inst{27-16} = 0b001100100000;
- let Inst{7-4} = 0b1111;
+ bits<4> opt;
+ let Inst{27-4} = 0b001100100000111100001111;
+ let Inst{3-0} = opt;
}
// A5.4 Permanently UNDEFINED instructions.
@@ -996,6 +997,9 @@ def PICSTRB : AXI2stb<(outs), (ins GPR:$src, addrmodepc:$addr, pred:$p),
// LEApcrel - Load a pc-relative address into a register without offending the
// assembler.
+// FIXME: These are marked as pseudos, but they're really not(?). They're just
+// the ADR instruction. Is this the right way to handle that? They need
+// encoding information regardless.
let neverHasSideEffects = 1 in {
let isReMaterializable = 1 in
def LEApcrel : AXI1<0x0, (outs GPR:$dst), (ins i32imm:$label, pred:$p),