Fix LSR's IV sorting function to explicitly sort by bitwidth

after sorting by stride value. This prevents it from missing
IV reuse opportunities in a host-sensitive manner.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64415 91177308-0d34-0410-b5e6-96231b3b80d8

2 files changed, 33 insertions, 4 deletions

diff --git a/lib/Transforms/Scalar/LoopStrengthReduce.cpp b/lib/Transforms/Scalar/LoopStrengthReduce.cpp
index a5fcdb4..683f741 100644
--- a/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+++ b/lib/Transforms/Scalar/LoopStrengthReduce.cpp
@@ -1772,12 +1772,19 @@ namespace {
         int64_t  RV = RHSC->getValue()->getSExtValue();
         uint64_t ALV = (LV < 0) ? -LV : LV;
         uint64_t ARV = (RV < 0) ? -RV : RV;
-        if (ALV == ARV)
-          return LV > RV;
-        else
+        if (ALV == ARV) {
+          if (LV != RV)
+            return LV > RV;
+        } else {
           return ALV < ARV;
+        }
+
+        // If it's the same value but different type, sort by bit width so
+        // that we emit larger induction variables before smaller
+        // ones, letting the smaller be re-written in terms of larger ones.
+        return RHS->getBitWidth() < LHS->getBitWidth();
       }
-      return (LHSC && !RHSC);
+      return LHSC && !RHSC;
     }
   };
 }
diff --git a/test/CodeGen/X86/lsr-sort.ll b/test/CodeGen/X86/lsr-sort.ll
new file mode 100644
index 0000000..00e1d69
--- /dev/null
+++ b/test/CodeGen/X86/lsr-sort.ll
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llc -march=x86-64 > %t
+; RUN: grep inc %t | count 1
+; RUN: not grep incw %t
+
+@X = common global i16 0		; <i16*> [#uses=1]
+
+define void @foo(i32 %N) nounwind {
+entry:
+	%0 = icmp sgt i32 %N, 0		; <i1> [#uses=1]
+	br i1 %0, label %bb, label %return
+
+bb:		; preds = %bb, %entry
+	%i.03 = phi i32 [ 0, %entry ], [ %indvar.next, %bb ]		; <i32> [#uses=2]
+	%1 = trunc i32 %i.03 to i16		; <i16> [#uses=1]
+	volatile store i16 %1, i16* @X, align 2
+	%indvar.next = add i32 %i.03, 1		; <i32> [#uses=2]
+	%exitcond = icmp eq i32 %indvar.next, %N		; <i1> [#uses=1]
+	br i1 %exitcond, label %return, label %bb
+
+return:		; preds = %bb, %entry
+	ret void
+}