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author | Chris Lattner <sabre@nondot.org> | 2009-06-27 05:24:12 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2009-06-27 05:24:12 +0000 |
commit | 6e6a883acd8ea022aed817a83a7345cd39c96d62 (patch) | |
tree | 4af02db67cb97f5fbe6ff8c9bce425425570c411 | |
parent | 402142e821f2d19e0436dd37adb5890a9c134dea (diff) | |
download | external_llvm-6e6a883acd8ea022aed817a83a7345cd39c96d62.zip external_llvm-6e6a883acd8ea022aed817a83a7345cd39c96d62.tar.gz external_llvm-6e6a883acd8ea022aed817a83a7345cd39c96d62.tar.bz2 |
simplify some code and eliminate the symbolicAddressesAreRIPRel() predicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74377 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/X86/X86FastISel.cpp | 9 | ||||
-rw-r--r-- | lib/Target/X86/X86TargetMachine.cpp | 8 | ||||
-rw-r--r-- | lib/Target/X86/X86TargetMachine.h | 6 |
3 files changed, 4 insertions, 19 deletions
diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index dd54299..8a21b35 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -396,8 +396,7 @@ bool X86FastISel::X86SelectAddress(Value *V, X86AddressMode &AM, bool isCall) { // Constant-offset addressing. Disp += CI->getSExtValue() * S; } else if (IndexReg == 0 && - (!AM.GV || - !getTargetMachine()->symbolicAddressesAreRIPRel()) && + (!AM.GV || !Subtarget->isPICStyleRIPRel()) && (S == 1 || S == 2 || S == 4 || S == 8)) { // Scaled-index addressing. Scale = S; @@ -432,7 +431,7 @@ bool X86FastISel::X86SelectAddress(Value *V, X86AddressMode &AM, bool isCall) { return false; // RIP-relative addresses can't have additional register operands. - if (getTargetMachine()->symbolicAddressesAreRIPRel() && + if (Subtarget->isPICStyleRIPRel() && (AM.Base.Reg != 0 || AM.IndexReg != 0)) return false; @@ -482,7 +481,7 @@ bool X86FastISel::X86SelectAddress(Value *V, X86AddressMode &AM, bool isCall) { // Prevent loading GV stub multiple times in same MBB. LocalValueMap[V] = AM.Base.Reg; - } else if (getTargetMachine()->symbolicAddressesAreRIPRel()) { + } else if (Subtarget->isPICStyleRIPRel()) { // Use rip-relative addressing if we can. AM.Base.Reg = X86::RIP; } @@ -491,7 +490,7 @@ bool X86FastISel::X86SelectAddress(Value *V, X86AddressMode &AM, bool isCall) { } // If all else fails, try to materialize the value in a register. - if (!AM.GV || !getTargetMachine()->symbolicAddressesAreRIPRel()) { + if (!AM.GV || !Subtarget->isPICStyleRIPRel()) { if (AM.Base.Reg == 0) { AM.Base.Reg = getRegForValue(V); return AM.Base.Reg != 0; diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index ac3bfb0..67dcd01 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -318,11 +318,3 @@ bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, return false; } -/// symbolicAddressesAreRIPRel - Return true if symbolic addresses are -/// RIP-relative on this machine, taking into consideration the relocation -/// model and subtarget. RIP-relative addresses cannot have a separate -/// base or index register. -bool X86TargetMachine::symbolicAddressesAreRIPRel() const { - return getRelocationModel() != Reloc::Static && - Subtarget.isPICStyleRIPRel(); -} diff --git a/lib/Target/X86/X86TargetMachine.h b/lib/Target/X86/X86TargetMachine.h index ecc1d39..ba73ca8 100644 --- a/lib/Target/X86/X86TargetMachine.h +++ b/lib/Target/X86/X86TargetMachine.h @@ -91,12 +91,6 @@ public: virtual bool addSimpleCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, bool DumpAsm, JITCodeEmitter &JCE); - - /// symbolicAddressesAreRIPRel - Return true if symbolic addresses are - /// RIP-relative on this machine, taking into consideration the relocation - /// model and subtarget. RIP-relative addresses cannot have a separate - /// base or index register. - bool symbolicAddressesAreRIPRel() const; }; /// X86_32TargetMachine - X86 32-bit target machine. |