Add a flag to disable jump table generation (all

switches use the binary search algorithm) for
environments that don't support it.  PPC64 JIT
is such an environment; turn the flag on for that.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54248 91177308-0d34-0410-b5e6-96231b3b80d8

5 files changed, 18 insertions, 3 deletions

diff --git a/include/llvm/Target/TargetOptions.h b/include/llvm/Target/TargetOptions.h
index a9964f7..fa73950 100644
--- a/include/llvm/Target/TargetOptions.h
+++ b/include/llvm/Target/TargetOptions.h
@@ -97,6 +97,10 @@ namespace llvm {
   /// VerboseAsm - When this flag is set, the asm printer prints additional
   /// comments to asm directives.
   extern bool VerboseAsm;
+
+  /// DisableJumpTables - This flag indicates jump tables should not be 
+  /// generated.
+  extern bool DisableJumpTables;
 } // End llvm namespace
 
 #endif
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 6267eb9..ef90400 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -1916,8 +1916,9 @@ bool SelectionDAGLowering::handleSmallSwitchRange(CaseRec& CR,
 }
 
 static inline bool areJTsAllowed(const TargetLowering &TLI) {
-  return (TLI.isOperationLegal(ISD::BR_JT, MVT::Other) ||
-          TLI.isOperationLegal(ISD::BRIND, MVT::Other));
+  return !DisableJumpTables &&
+          (TLI.isOperationLegal(ISD::BR_JT, MVT::Other) ||
+           TLI.isOperationLegal(ISD::BRIND, MVT::Other));
 }
   
 /// handleJTSwitchCase - Emit jumptable for current switch case range
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 1fe2e8c..fcf235c 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -43,7 +43,7 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
   : TargetLowering(TM), PPCSubTarget(*TM.getSubtargetImpl()) {
     
   setPow2DivIsCheap();
-  
+
   // Use _setjmp/_longjmp instead of setjmp/longjmp.
   setUseUnderscoreSetJmp(true);
   setUseUnderscoreLongJmp(true);
diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index 8fa0809..7c90eca 100644
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -17,6 +17,7 @@
 #include "llvm/Module.h"
 #include "llvm/PassManager.h"
 #include "llvm/Target/TargetMachineRegistry.h"
+#include "llvm/Target/TargetOptions.h"
 using namespace llvm;
 
 // Register the targets
@@ -144,6 +145,9 @@ bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
     // instructions to materialize arbitrary global variable + function +
     // constant pool addresses.
     setRelocationModel(Reloc::PIC_);
+    // Temporary workaround for the inability of PPC64 JIT to handle jump
+    // tables.
+    DisableJumpTables = true;      
   } else {
     setRelocationModel(Reloc::Static);
   }
diff --git a/lib/Target/TargetMachine.cpp b/lib/Target/TargetMachine.cpp
index 0764968..600a120 100644
--- a/lib/Target/TargetMachine.cpp
+++ b/lib/Target/TargetMachine.cpp
@@ -39,6 +39,7 @@ namespace llvm {
   unsigned StackAlignment;
   bool RealignStack;
   bool VerboseAsm;
+  bool DisableJumpTables;
 }
 
 static cl::opt<bool, true> PrintCode("print-machineinstrs",
@@ -156,6 +157,11 @@ AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
            cl::location(VerboseAsm),
            cl::init(false));
 
+static cl::opt<bool, true>
+DisableSwitchTables(cl::Hidden, "disable-jump-tables", 
+           cl::desc("Do not generate jump tables."),
+           cl::location(DisableJumpTables),
+           cl::init(false));
 
 //---------------------------------------------------------------------------
 // TargetMachine Class