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author | Eric Christopher <echristo@apple.com> | 2010-09-28 22:47:54 +0000 |
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committer | Eric Christopher <echristo@apple.com> | 2010-09-28 22:47:54 +0000 |
commit | 744c7c8e1b9bf166ded2b4e0b57638a004a44f8d (patch) | |
tree | 249f5b35c4af0385772e1f2c4edc8fb1b8442e88 | |
parent | 3609eb0de2f786ca6917d0388c37c23873dbd247 (diff) | |
download | external_llvm-744c7c8e1b9bf166ded2b4e0b57638a004a44f8d.zip external_llvm-744c7c8e1b9bf166ded2b4e0b57638a004a44f8d.tar.gz external_llvm-744c7c8e1b9bf166ded2b4e0b57638a004a44f8d.tar.bz2 |
32-bit constant ints only for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115001 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/ARM/ARMFastISel.cpp | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index 6665704..ff359eb 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -134,7 +134,7 @@ class ARMFastISel : public FastISel { bool ARMStoreAlloca(const Instruction *I, unsigned SrcReg, EVT VT); bool ARMComputeRegOffset(const Value *Obj, unsigned &Reg, int &Offset); unsigned ARMMaterializeFP(const ConstantFP *CFP, EVT VT); - unsigned ARMMaterializeInt(const Constant *C); + unsigned ARMMaterializeInt(const Constant *C, EVT VT); unsigned ARMMoveToFPReg(EVT VT, unsigned SrcReg); unsigned ARMMoveToIntReg(EVT VT, unsigned SrcReg); @@ -404,8 +404,11 @@ unsigned ARMFastISel::ARMMaterializeFP(const ConstantFP *CFP, EVT VT) { return DestReg; } -// TODO: Verify 64-bit. -unsigned ARMFastISel::ARMMaterializeInt(const Constant *C) { +unsigned ARMFastISel::ARMMaterializeInt(const Constant *C, EVT VT) { + + // For now 32-bit only. + if (VT.getSimpleVT().SimpleTy != MVT::i32) return false; + // MachineConstantPool wants an explicit alignment. unsigned Align = TD.getPrefTypeAlignment(C->getType()); if (Align == 0) { @@ -413,7 +416,7 @@ unsigned ARMFastISel::ARMMaterializeInt(const Constant *C) { Align = TD.getTypeAllocSize(C->getType()); } unsigned Idx = MCP.getConstantPoolIndex(C, Align); - unsigned DestReg = createResultReg(TLI.getRegClassFor(MVT::i32)); + unsigned DestReg = createResultReg(TLI.getRegClassFor(VT)); if (isThumb) AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, @@ -437,7 +440,7 @@ unsigned ARMFastISel::TargetMaterializeConstant(const Constant *C) { if (const ConstantFP *CFP = dyn_cast<ConstantFP>(C)) return ARMMaterializeFP(CFP, VT); - return ARMMaterializeInt(C); + return ARMMaterializeInt(C, VT); } bool ARMFastISel::isTypeLegal(const Type *Ty, EVT &VT) { |