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authorJim Grosbach <grosbach@apple.com>2011-07-27 18:19:32 +0000
committerJim Grosbach <grosbach@apple.com>2011-07-27 18:19:32 +0000
commit766c63e78b6c14b7967790dcc2c613971a72e132 (patch)
treef376ec2f20532767393a47c72e769ac265cc9fa1
parent0a2a306be274843f930273316ca40dbbd7f92d4a (diff)
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ARM assembly parsing aliases for extend instructions w/o rotate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136229 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/ARM/ARMInstrInfo.td22
1 files changed, 22 insertions, 0 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index aa1f07d..6527e72 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -4342,3 +4342,25 @@ def : InstAlias<"rsc${s}${p} $Rdn, $shift",
// SSAT optional shift operand.
def : InstAlias<"ssat${p} $Rd, $sat_imm, $Rn",
(SSAT GPR:$Rd, imm1_32:$sat_imm, GPR:$Rn, 0, pred:$p)>;
+
+
+// Extend instruction optional rotate operand.
+def : InstAlias<"sxtab${p} $Rd, $Rn, $Rm",
+ (SXTAB GPR:$Rd, GPR:$Rn, GPR:$Rm, 0, pred:$p)>;
+def : InstAlias<"sxtah${p} $Rd, $Rn, $Rm",
+ (SXTAH GPR:$Rd, GPR:$Rn, GPR:$Rm, 0, pred:$p)>;
+def : InstAlias<"sxtab16${p} $Rd, $Rn, $Rm",
+ (SXTAB16 GPR:$Rd, GPR:$Rn, GPR:$Rm, 0, pred:$p)>;
+def : InstAlias<"sxtb${p} $Rd, $Rm", (SXTB GPR:$Rd, GPR:$Rm, 0, pred:$p)>;
+def : InstAlias<"sxtb16${p} $Rd, $Rm", (SXTB16 GPR:$Rd, GPR:$Rm, 0, pred:$p)>;
+def : InstAlias<"sxth${p} $Rd, $Rm", (SXTH GPR:$Rd, GPR:$Rm, 0, pred:$p)>;
+
+def : InstAlias<"uxtab${p} $Rd, $Rn, $Rm",
+ (UXTAB GPR:$Rd, GPR:$Rn, GPR:$Rm, 0, pred:$p)>;
+def : InstAlias<"uxtah${p} $Rd, $Rn, $Rm",
+ (UXTAH GPR:$Rd, GPR:$Rn, GPR:$Rm, 0, pred:$p)>;
+def : InstAlias<"uxtab16${p} $Rd, $Rn, $Rm",
+ (UXTAB16 GPR:$Rd, GPR:$Rn, GPR:$Rm, 0, pred:$p)>;
+def : InstAlias<"uxtb${p} $Rd, $Rm", (UXTB GPR:$Rd, GPR:$Rm, 0, pred:$p)>;
+def : InstAlias<"uxtb16${p} $Rd, $Rm", (UXTB16 GPR:$Rd, GPR:$Rm, 0, pred:$p)>;
+def : InstAlias<"uxth${p} $Rd, $Rm", (UXTH GPR:$Rd, GPR:$Rm, 0, pred:$p)>;