diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2006-03-25 01:33:37 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-03-25 01:33:37 +0000 |
| commit | 7b1d34bc6c27b7ba26c270ca3c434a640e7f7c7f (patch) | |
| tree | 268f03f4764c00559e5b3ab8ba16de9cd77f1e58 | |
| parent | 3246e06f8421f10e7de379fcf152cecc2b3fc09f (diff) | |
| download | external_llvm-7b1d34bc6c27b7ba26c270ca3c434a640e7f7c7f.zip external_llvm-7b1d34bc6c27b7ba26c270ca3c434a640e7f7c7f.tar.gz external_llvm-7b1d34bc6c27b7ba26c270ca3c434a640e7f7c7f.tar.bz2 | |
Added 128-bit packed integer subtraction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27096 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 3 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 23 |
2 files changed, 26 insertions, 0 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 0a9f4b4..01951e6 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -294,6 +294,9 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM) setOperationAction(ISD::ADD, MVT::v8i16, Legal); setOperationAction(ISD::ADD, MVT::v4i32, Legal); setOperationAction(ISD::SUB, MVT::v2f64, Legal); + setOperationAction(ISD::SUB, MVT::v16i8, Legal); + setOperationAction(ISD::SUB, MVT::v8i16, Legal); + setOperationAction(ISD::SUB, MVT::v4i32, Legal); setOperationAction(ISD::MUL, MVT::v2f64, Legal); setOperationAction(ISD::LOAD, MVT::v2f64, Legal); setOperationAction(ISD::LOAD, MVT::v16i8, Legal); diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index af158f9..fd97877 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -862,6 +862,29 @@ def PADDDrm : PDI<0xFE, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2), "paddd {$src2, $dst|$dst, $src2}", [(set VR128:$dst, (v4i32 (add VR128:$src1, (load addr:$src2))))]>; + +def PSUBBrr : PDI<0xF8, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), + "psubb {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (v16i8 (sub VR128:$src1, VR128:$src2)))]>; +def PSUBWrr : PDI<0xF9, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), + "psubw {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (v8i16 (sub VR128:$src1, VR128:$src2)))]>; +def PSUBDrr : PDI<0xFA, MRMSrcReg, (ops VR128:$dst, VR128:$src1, VR128:$src2), + "psubd {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (v4i32 (sub VR128:$src1, VR128:$src2)))]>; + +def PSUBBrm : PDI<0xF8, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2), + "psubb {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (v16i8 (sub VR128:$src1, + (load addr:$src2))))]>; +def PSUBWrm : PDI<0xF9, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2), + "psubw {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (v8i16 (sub VR128:$src1, + (load addr:$src2))))]>; +def PSUBDrm : PDI<0xFA, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f128mem:$src2), + "psubd {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, (v4i32 (sub VR128:$src1, + (load addr:$src2))))]>; } //===----------------------------------------------------------------------===// |