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| author | Andrew Trick <atrick@apple.com> | 2013-05-25 03:26:51 +0000 |
|---|---|---|
| committer | Andrew Trick <atrick@apple.com> | 2013-05-25 03:26:51 +0000 |
| commit | 81349a74352d5f2ccd527cf3389b7a1055e57a1d (patch) | |
| tree | bbca009295102a33a8e104ed8755a95342e4d296 | |
| parent | dd0fb018a7cd2214c7bc5c6c767f626f99b47ba9 (diff) | |
| download | external_llvm-81349a74352d5f2ccd527cf3389b7a1055e57a1d.zip external_llvm-81349a74352d5f2ccd527cf3389b7a1055e57a1d.tar.gz external_llvm-81349a74352d5f2ccd527cf3389b7a1055e57a1d.tar.bz2 | |
Track IR ordering of SelectionDAG nodes 4/4.
Unit test cases for -pre-RA-sched=source.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182706 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | test/CodeGen/ARM/crash-greedy-v6.ll | 21 | ||||
| -rw-r--r-- | test/CodeGen/Mips/selectcc.ll | 16 | ||||
| -rw-r--r-- | test/CodeGen/X86/2008-09-11-CoalescerBug2.ll | 12 |
3 files changed, 49 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/crash-greedy-v6.ll b/test/CodeGen/ARM/crash-greedy-v6.ll index fd42254..bac4d27 100644 --- a/test/CodeGen/ARM/crash-greedy-v6.ll +++ b/test/CodeGen/ARM/crash-greedy-v6.ll @@ -1,4 +1,5 @@ ; RUN: llc -disable-fp-elim -relocation-model=pic < %s +; RUN: llc -disable-fp-elim -relocation-model=pic -pre-RA-sched=source < %s | FileCheck %s --check-prefix=SOURCE-SCHED target triple = "armv6-apple-ios" ; Reduced from 177.mesa. This test causes a live range split before an LDR_POST instruction. @@ -11,6 +12,26 @@ for.body.lr.ph: ; preds = %entry br label %for.body for.body: ; preds = %for.body, %for.body.lr.ph +; SOURCE-SCHED: str +; SOURCE-SCHED: add +; SOURCE-SCHED: sub +; SOURCE-SCHED: ldr +; SOURCE-SCHED: ldr +; SOURCE-SCHED: str +; SOURCE-SCHED: str +; SOURCE-SCHED: str +; SOURCE-SCHED: str +; SOURCE-SCHED: add +; SOURCE-SCHED: add +; SOURCE-SCHED: add +; SOURCE-SCHED: add +; SOURCE-SCHED: str +; SOURCE-SCHED: mov +; SOURCE-SCHED: bl +; SOURCE-SCHED: ldr +; SOURCE-SCHED: ldr +; SOURCE-SCHED: cmp +; SOURCE-SCHED: bne %i.031 = phi i32 [ 0, %for.body.lr.ph ], [ %0, %for.body ] %arrayidx11 = getelementptr float* %t, i32 %i.031 %arrayidx15 = getelementptr float* %u, i32 %i.031 diff --git a/test/CodeGen/Mips/selectcc.ll b/test/CodeGen/Mips/selectcc.ll index a17517e..aeef60e 100644 --- a/test/CodeGen/Mips/selectcc.ll +++ b/test/CodeGen/Mips/selectcc.ll @@ -1,4 +1,5 @@ ; RUN: llc -march=mipsel < %s +; RUN: llc -march=mipsel -pre-RA-sched=source < %s | FileCheck %s --check-prefix=SOURCE-SCHED @gf0 = external global float @gf1 = external global float @@ -7,6 +8,21 @@ define float @select_cc_f32(float %a, float %b) nounwind { entry: +; SOURCE-SCHED: lui +; SOURCE-SCHED: addiu +; SOURCE-SCHED: addu +; SOURCE-SCHED: lw +; SOURCE-SCHED: sw +; SOURCE-SCHED: lw +; SOURCE-SCHED: lui +; SOURCE-SCHED: sw +; SOURCE-SCHED: addiu +; SOURCE-SCHED: addiu +; SOURCE-SCHED: c.olt.s +; SOURCE-SCHED: movt +; SOURCE-SCHED: mtc1 +; SOURCE-SCHED: jr + store float 0.000000e+00, float* @gf0, align 4 store float 1.000000e+00, float* @gf1, align 4 %cmp = fcmp olt float %a, %b diff --git a/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll b/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll index 534f990..e8a3e56 100644 --- a/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll +++ b/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -march=x86 +; RUN: llc -pre-RA-sched=source < %s -march=x86 | FileCheck %s --check-prefix=SOURCE-SCHED ; PR2748 @g_73 = external global i32 ; <i32*> [#uses=1] @@ -6,6 +7,17 @@ define i32 @func_44(i16 signext %p_46) nounwind { entry: +; SOURCE-SCHED: subl +; SOURCE-SCHED: movl +; SOURCE-SCHED: sarl +; SOURCE-SCHED: cmpl +; SOURCE-SCHED: setg +; SOURCE-SCHED: movzbl +; SOURCE-SCHED: movb +; SOURCE-SCHED: xorl +; SOURCE-SCHED: subl +; SOURCE-SCHED: testb +; SOURCE-SCHED: jne %0 = load i32* @g_5, align 4 ; <i32> [#uses=1] %1 = ashr i32 %0, 1 ; <i32> [#uses=1] %2 = icmp sgt i32 %1, 1 ; <i1> [#uses=1] |